Searched refs:Mask0Imm (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | bitfield-insert.ll | 362 ; The next set of tests generate a BFXIL from 'or (and X, Mask0Imm),
363 ; (and Y, Mask1Imm)' iff Mask0Imm and ~Mask1Imm are equivalent and one of the
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2766 uint64_t Mask0Imm, Mask1Imm; in tryBitfieldInsertOpFromOr() local
2770 isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) && in tryBitfieldInsertOpFromOr()
2772 APInt(BitWidth, Mask0Imm) == ~APInt(BitWidth, Mask1Imm) && in tryBitfieldInsertOpFromOr()
2773 (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) { in tryBitfieldInsertOpFromOr()
2778 if (isShiftedMask(Mask0Imm, VT)) { in tryBitfieldInsertOpFromOr()
2780 std::swap(Mask0Imm, Mask1Imm); in tryBitfieldInsertOpFromOr()
2786 int Width = BitWidth - APInt(BitWidth, Mask0Imm).countPopulation(); in tryBitfieldInsertOpFromOr()
|