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Searched refs:MachineIRBuilder (Results 1 – 25 of 80) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h25 class MachineIRBuilder; variable
47 MachineIRBuilder &B) const;
49 MachineIRBuilder &B) const;
51 MachineIRBuilder &B) const;
67 MachineIRBuilder &B) const;
78 MachineIRBuilder &B) const;
87 MachineIRBuilder &B) const;
133 MachineIRBuilder &B) const;
135 MachineIRBuilder &B) const;
137 MachineIRBuilder &B) const;
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H A DAMDGPUCallLowering.h27 void lowerParameterPtr(Register DstReg, MachineIRBuilder &B,
30 void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset,
37 bool lowerReturnVal(MachineIRBuilder &B, const Value *Val,
43 bool lowerReturn(MachineIRBuilder &B, const Value *Val,
47 bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F,
50 bool lowerFormalArguments(MachineIRBuilder &B, const Function &F,
54 bool passSpecialInputs(MachineIRBuilder &MIRBuilder,
70 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
76 MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst,
80 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
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H A DAMDGPURegisterBankInfo.h28 class MachineIRBuilder; variable
48 bool buildVCopy(MachineIRBuilder &B, Register DstReg, Register SrcReg) const;
57 MachineIRBuilder &B,
62 Register buildReadFirstLane(MachineIRBuilder &B, MachineRegisterInfo &MRI,
65 bool executeInWaterfallLoop(MachineIRBuilder &B,
91 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
95 splitBufferOffsets(MachineIRBuilder &B, Register Offset) const;
126 void split64BitValueForMapping(MachineIRBuilder &B,
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DIRTranslator.h208 MachineIRBuilder &MIRBuilder);
279 MachineIRBuilder &MIRBuilder);
304 MachineIRBuilder &MIRBuilder);
309 MachineIRBuilder &MIRBuilder);
343 MachineIRBuilder &MIB);
357 MachineIRBuilder &MIB, MachineFunction::iterator BBI,
366 MachineIRBuilder &MIB,
372 MachineIRBuilder &MIB, MachineFunction::iterator BBI,
380 MachineIRBuilder &MIB);
549 std::unique_ptr<MachineIRBuilder> CurBuilder;
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H A DCallLowering.h38 class MachineIRBuilder; variable
227 MachineIRBuilder &MIRBuilder;
231 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, in ValueHandler()
395 MachineIRBuilder &MIRBuilder,
405 MachineIRBuilder &MIRBuilder,
445 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
451 void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy,
464 void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
535 virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments()
547 virtual bool lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
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H A DCSEMIRBuilder.h32 class CSEMIRBuilder : public MachineIRBuilder {
92 using MachineIRBuilder::MachineIRBuilder;
98 using MachineIRBuilder::buildConstant;
104 using MachineIRBuilder::buildFConstant;
H A DInlineAsmLowering.h22 class MachineIRBuilder; variable
38 bool lowerInlineAsm(MachineIRBuilder &MIRBuilder, const CallBase &CB,
49 MachineIRBuilder &MIRBuilder) const;
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.h49 createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
53 const Type *Ty, MachineIRBuilder &MIRBuilder,
57 MachineIRBuilder &MIRBuilder,
122 const Type *Type, MachineIRBuilder &MIRBuilder,
168 SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
175 SPIRVType *getOpTypeVoid(MachineIRBuilder &MIRBuilder);
178 MachineIRBuilder &MIRBuilder);
184 MachineIRBuilder &MIRBuilder);
197 MachineIRBuilder &MIRBuilder);
237 SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
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H A DSPIRVGlobalRegistry.cpp46 const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, in assignTypeToVReg()
61 static Register createTypeVReg(MachineIRBuilder &MIRBuilder) { in createTypeVReg()
74 SPIRVType *SPIRVGlobalRegistry::getOpTypeBool(MachineIRBuilder &MIRBuilder) { in getOpTypeBool()
80 MachineIRBuilder &MIRBuilder, in getOpTypeInt()
97 SPIRVType *SPIRVGlobalRegistry::getOpTypeVoid(MachineIRBuilder &MIRBuilder) { in getOpTypeVoid()
119 MachineIRBuilder *MIRBuilder, in getOrCreateConstIntReg()
301 SPIRV::LinkageType LinkageType, MachineIRBuilder &MIRBuilder, in buildGlobalVariable()
464 MachineIRBuilder &MIRBuilder) { in getOpTypeFunction()
476 MachineIRBuilder &MIRBuilder) { in getOrCreateOpTypeFunctionWithArgs()
579 const Type *Ty, MachineIRBuilder &MIRBuilder, in restOfCreateSPIRVType()
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H A DSPIRVCallLowering.h33 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
43 bool lowerCall(MachineIRBuilder &MIRBuilder,
H A DSPIRVUtils.h25 class MachineIRBuilder; variable
49 llvm::MachineIRBuilder &MIRBuilder);
52 void buildOpDecorate(llvm::Register Reg, llvm::MachineIRBuilder &MIRBuilder,
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp24 void MachineIRBuilder::setMF(MachineFunction &MF) { in setMF()
75 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI, in buildFIDbgValue()
191 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0, in materializePtrAdd()
398 MachineInstrBuilder MachineIRBuilder::buildLoadFromOffset( in buildLoadFromOffset()
601 MachineIRBuilder::buildMerge(const DstOp &Res, in buildMerge()
617 MachineInstrBuilder MachineIRBuilder::buildUnmerge(LLT Res, in buildUnmerge()
644 MachineIRBuilder::buildBuildVectorConstant(const DstOp &Res, in buildBuildVectorConstant()
661 MachineIRBuilder::buildBuildVectorTrunc(const DstOp &Res, in buildBuildVectorTrunc()
850 MachineInstrBuilder MachineIRBuilder::buildAtomicRMW( in buildAtomicRMW()
943 MachineIRBuilder::buildAtomicRMWFAdd( in buildAtomicRMWFAdd()
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H A DCSEMIRBuilder.cpp278 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
282 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
299 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
307 return MachineIRBuilder::buildConstant(Res, Val); in buildConstant()
326 MachineInstrBuilder NewMIB = MachineIRBuilder::buildConstant(Res, Val); in buildConstant()
334 return MachineIRBuilder::buildFConstant(Res, Val); in buildFConstant()
352 MachineInstrBuilder NewMIB = MachineIRBuilder::buildFConstant(Res, Val); in buildFConstant()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.h27 class MachineIRBuilder; variable
34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
44 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
48 bool lowerCall(MachineIRBuilder &MIRBuilder,
53 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
63 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
67 std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
69 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
H A DAArch64LegalizerInfo.h38 MachineIRBuilder &MIRBuilder) const;
40 MachineIRBuilder &MIRBuilder,
43 MachineIRBuilder &MIRBuilder,
47 MachineIRBuilder &MIRBuilder,
H A DAArch64PostLegalizerCombiner.cpp97 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
126 std::function<void(MachineIRBuilder &B, Register DstReg)> &ApplyFn) { in matchAArch64MulConstCombine()
213 ApplyFn = [=](MachineIRBuilder &B, Register DstReg) { in matchAArch64MulConstCombine()
238 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
239 std::function<void(MachineIRBuilder &B, Register DstReg)> &ApplyFn) { in applyAArch64MulConstCombine()
257 MachineIRBuilder &B, GISelChangeObserver &Observer) { in applyFoldMergeToZext()
287 MachineIRBuilder &B, in applyMutateAnyExtToZExt()
313 MachineIRBuilder &B, in applySplitStoreZero128()
359 MachineIRBuilder &B) const override;
364 MachineIRBuilder &B) const { in combine()
H A DAArch64PostLegalizerLowering.cpp398 MachineIRBuilder MIRBuilder(MI); in applyShuffleVectorPseudo()
408 MachineIRBuilder MIRBuilder(MI); in applyEXT()
457 MachineIRBuilder &Builder, in applyINS()
505 MachineIRBuilder MIB(MI); in applyVAshrLshrImm()
631 MachineIRBuilder &MIB, GISelChangeObserver &Observer) { in applyAdjustICmpImmAndPred()
737 MachineIRBuilder &B) { in applyBuildVectorToDup()
856 static std::function<Register(MachineIRBuilder &)>
866 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP()
912 MachineIRBuilder &MIB) { in lowerVectorFCMP()
969 MachineIRBuilder &B, in applyFormTruncstore()
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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMCallLowering.h27 class MachineIRBuilder; variable
34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
42 bool lowerCall(MachineIRBuilder &MIRBuilder,
46 bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
/llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.h34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
42 bool lowerCall(MachineIRBuilder &MIRBuilder,
48 M68kIncomingValueHandler(MachineIRBuilder &MIRBuilder, in M68kIncomingValueHandler()
67 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
72 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.h29 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
32 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
35 bool lowerCall(MachineIRBuilder &MIRBuilder,
41 PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, in PPCIncomingValueHandler()
66 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
H A DPPCCallLowering.cpp33 bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn()
46 bool PPCCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
51 bool PPCCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments()
94 auto BuildLoad = [](MachineIRBuilder &MIRBuilder, MachinePointerInfo &MPO, in assignValueToAddress()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVCallLowering.h30 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
34 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
38 bool lowerCall(MachineIRBuilder &MIRBuilder,
H A DRISCVCallLowering.cpp24 bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn()
37 bool RISCVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments()
48 bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsCallLowering.h27 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
31 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
35 bool lowerCall(MachineIRBuilder &MIRBuilder,
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CallLowering.h29 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
33 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
37 bool lowerCall(MachineIRBuilder &MIRBuilder,

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