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Searched refs:MachineFunction (Results 1 – 25 of 998) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FrameLowering.h58 MachineFunction &MF, MachineBasicBlock &MBB,
65 void inlineStackProbe(MachineFunction &MF,
80 void adjustForSegmentedStacks(MachineFunction &MF,
83 void adjustForHiPEPrologue(MachineFunction &MF,
90 assignCalleeSavedSpillSlots(MachineFunction &MF,
105 bool hasFP(const MachineFunction &MF) const override;
174 void orderFrameObjects(const MachineFunction &MF,
197 bool has128ByteRedZone(const MachineFunction& MF) const;
200 bool isWin64Prologue(const MachineFunction &MF) const;
202 bool needsDwarfCFI(const MachineFunction &MF) const;
[all …]
H A DX86RegisterInfo.h71 const MachineFunction &MF) const override;
81 getPointerRegClass(const MachineFunction &MF,
93 getGPRsForTailCall(const MachineFunction &MF) const;
96 MachineFunction &MF) const override;
101 getCalleeSavedRegs(const MachineFunction* MF) const override;
103 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
104 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
120 bool isArgumentRegister(const MachineFunction &MF,
127 bool isFixedRegister(const MachineFunction &MF,
132 bool hasBasePointer(const MachineFunction &MF) const;
[all …]
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.h44 bool hasFP(const MachineFunction &MF) const override;
49 bool needsPrologForEH(const MachineFunction &MF) const;
62 static unsigned getSPReg(const MachineFunction &MF);
63 static unsigned getFPReg(const MachineFunction &MF);
64 static unsigned getOpcConst(const MachineFunction &MF);
65 static unsigned getOpcAdd(const MachineFunction &MF);
66 static unsigned getOpcSub(const MachineFunction &MF);
67 static unsigned getOpcAnd(const MachineFunction &MF);
72 bool hasBP(const MachineFunction &MF) const;
74 bool needsSP(const MachineFunction &MF) const;
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h21 class MachineFunction; variable
38 bool isAnyArgRegReserved(const MachineFunction &MF) const;
41 void UpdateCustomCalleeSavedRegs(MachineFunction &MF) const;
42 void UpdateCustomCallPreservedMask(MachineFunction &MF,
49 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
50 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
92 bool isAsmClobberable(const MachineFunction &MF,
96 getPointerRegClass(const MachineFunction &MF,
115 bool cannotEliminateFrame(const MachineFunction &MF) const;
118 bool hasBasePointer(const MachineFunction &MF) const;
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H A DAArch64FrameLowering.h50 StackOffset resolveFrameOffsetReference(const MachineFunction &MF,
66 bool canUseRedZone(const MachineFunction &MF) const;
68 bool hasFP(const MachineFunction &MF) const override;
71 bool assignCalleeSavedSpillSlots(MachineFunction &MF,
88 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
92 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
100 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
125 orderFrameObjects(const MachineFunction &MF,
133 bool homogeneousPrologEpilog(MachineFunction &MF,
137 bool producePairRegisters(MachineFunction &MF) const;
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/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetFrameLowering.h23 class MachineFunction; variable
148 const MachineFunction &MF) const;
165 assignCalleeSavedSpillSlots(MachineFunction &MF, in assignCalleeSavedSpillSlots()
211 virtual void emitPrologue(MachineFunction &MF,
213 virtual void emitEpilogue(MachineFunction &MF,
228 virtual bool enableCFIFixup(MachineFunction &MF) const;
235 virtual void inlineStackProbe(MachineFunction &MF, in inlineStackProbe()
248 virtual void adjustForHiPEPrologue(MachineFunction &MF, in adjustForHiPEPrologue()
345 virtual void getCalleeSaves(const MachineFunction &MF,
388 eliminateCallFramePseudoInstr(MachineFunction &MF, in eliminateCallFramePseudoInstr()
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H A DTargetRegisterInfo.h38 class MachineFunction; variable
69 ArrayRef<MCPhysReg> (*OrderFunc)(const MachineFunction&);
348 BitVector getAllocatableSet(const MachineFunction &MF,
460 getCalleeSavedRegs(const MachineFunction *MF) const = 0;
502 getIntraCallClobberedRegs(const MachineFunction *MF) const { in getIntraCallClobberedRegs()
528 virtual bool isAsmClobberable(const MachineFunction &MF, in isAsmClobberable()
564 virtual bool isArgumentRegister(const MachineFunction &MF, in isArgumentRegister()
570 virtual bool isFixedRegister(const MachineFunction &MF, in isFixedRegister()
789 const MachineFunction &) const { in getLargestLegalSuperClass() argument
862 const MachineFunction &MF,
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/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h32 const MachineFunction &MF) const override { in allocateScavengingFrameIndexesNearIncomingSP()
57 assignCalleeSavedSpillSlots(MachineFunction &MF,
75 void inlineStackProbe(MachineFunction &MF,
77 bool hasFP(const MachineFunction &MF) const override;
81 orderFrameObjects(const MachineFunction &MF,
89 bool usePackedStack(MachineFunction &MF) const;
92 unsigned getBackchainOffset(MachineFunction &MF) const { in getBackchainOffset()
108 assignCalleeSavedSpillSlots(MachineFunction &MF,
130 void inlineStackProbe(MachineFunction &MF,
133 bool hasFP(const MachineFunction &MF) const override;
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H A DSystemZRegisterInfo.h63 getCalleeSavedRegs(const MachineFunction *MF) const = 0;
66 virtual const uint32_t *getCallPreservedMask(const MachineFunction &MF,
92 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const final;
94 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
115 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const final;
117 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
136 getPointerRegClass(const MachineFunction &MF,
153 bool requiresRegisterScavenging(const MachineFunction &MF) const override { in requiresRegisterScavenging()
160 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
162 BitVector getReservedRegs(const MachineFunction &MF) const override;
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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFrameLowering.h19 class MachineFunction; variable
44 bool keepFramePointer(const MachineFunction &MF) const override;
46 bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
48 bool hasFP(const MachineFunction &MF) const override;
49 bool isFPReserved(const MachineFunction &MF) const;
50 bool hasReservedCallFrame(const MachineFunction &MF) const override;
54 int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
57 void getCalleeSaves(const MachineFunction &MF,
62 void adjustForSegmentedStacks(MachineFunction &MF,
75 assignCalleeSavedSpillSlots(MachineFunction &MF,
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H A DARMBaseRegisterInfo.h144 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
145 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
163 getIntraCallClobberedRegs(const MachineFunction *MF) const override;
166 bool isAsmClobberable(const MachineFunction &MF,
168 bool isInlineAsmReadOnlyReg(const MachineFunction &MF,
172 getPointerRegClass(const MachineFunction &MF,
182 MachineFunction &MF) const override;
190 MachineFunction &MF) const override;
192 bool hasBasePointer(const MachineFunction &MF) const;
194 bool canRealignStack(const MachineFunction &MF) const override;
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.h23 void emitEntryFunctionPrologue(MachineFunction &MF,
25 void emitPrologue(MachineFunction &MF,
27 void emitEpilogue(MachineFunction &MF,
32 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
37 assignCalleeSavedSpillSlots(MachineFunction &MF,
42 const MachineFunction &MF) const override;
47 MachineFunction &MF,
54 eliminateCallFramePseudoInstr(MachineFunction &MF,
59 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
68 MachineFunction &MF, MachineBasicBlock &MBB,
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H A DSIRegisterInfo.h77 BitVector getReservedRegs(const MachineFunction &MF) const override;
78 bool isAsmClobberable(const MachineFunction &MF,
83 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
95 const MachineFunction &MF) const override;
99 bool hasBasePointer(const MachineFunction &MF) const;
102 bool shouldRealignStack(const MachineFunction &MF) const override;
107 const MachineFunction &MF) const override;
127 const MachineFunction &MF, unsigned Kind = 0) const override;
281 const MachineFunction &MF,
312 unsigned getRegPressureSetLimit(const MachineFunction &MF,
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/llvm-project-15.0.7/llvm/unittests/MI/
H A DLiveIntervalTest.cpp206 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
217 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
228 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
239 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
249 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
260 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
275 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
286 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
297 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
308 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.h26 class MachineFunction; variable
41 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
43 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const in emitEpilogue()
77 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
88 bool hasFP(const MachineFunction &MF) const override;
104 bool assignCalleeSavedSpillSlots(MachineFunction &MF,
108 bool needsAligna(const MachineFunction &MF) const;
111 void insertCFIInstructions(MachineFunction &MF) const;
161 bool expandSpillMacros(MachineFunction &MF,
168 void optimizeSpillSlots(MachineFunction &MF,
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H A DHexagonRegisterInfo.h34 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF)
36 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
39 BitVector getReservedRegs(const MachineFunction &MF) const override;
46 bool requiresRegisterScavenging(const MachineFunction &MF) const override { in requiresRegisterScavenging()
52 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { in requiresFrameIndexScavenging()
57 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
65 Register getFrameRegister(const MachineFunction &MF) const override;
72 const MCPhysReg *getCallerSavedRegs(const MachineFunction *MF,
78 getPointerRegClass(const MachineFunction &MF,
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.h33 uint64_t getStackSizeWithRVVPadding(const MachineFunction &MF) const;
35 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
38 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
41 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
44 bool hasFP(const MachineFunction &MF) const override;
46 bool hasBP(const MachineFunction &MF) const;
48 bool hasReservedCallFrame(const MachineFunction &MF) const override;
65 uint64_t getFirstSPAdjustAmount(const MachineFunction &MF) const;
79 void determineFrameLayout(MachineFunction &MF) const;
83 void adjustStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
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H A DRISCVRegisterInfo.h27 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
30 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
32 BitVector getReservedRegs(const MachineFunction &MF) const override;
33 bool isAsmClobberable(const MachineFunction &MF,
40 bool hasReservedSpillSlot(const MachineFunction &MF, Register Reg,
47 Register getFrameRegister(const MachineFunction &MF) const override;
49 bool requiresRegisterScavenging(const MachineFunction &MF) const override { in requiresRegisterScavenging()
53 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { in requiresFrameIndexScavenging()
58 getPointerRegClass(const MachineFunction &MF,
65 const MachineFunction &) const override;
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/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEFrameLowering.h31 void emitPrologueInsns(MachineFunction &MF, MachineBasicBlock &MBB,
34 void emitEpilogueInsns(MachineFunction &MF, MachineBasicBlock &MBB,
42 bool hasFP(const MachineFunction &MF) const override;
43 bool hasBP(const MachineFunction &MF) const;
44 bool hasGOT(const MachineFunction &MF) const;
48 bool hasReservedCallFrame(const MachineFunction &MF) const override { in hasReservedCallFrame()
51 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
54 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
74 bool isLeafProc(MachineFunction &MF) const;
77 void emitSPAdjustment(MachineFunction &MF, MachineBasicBlock &MBB,
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.h83 bool stackUpdateCanBeMoved(MachineFunction &MF) const;
91 uint64_t determineFrameLayoutAndUpdate(MachineFunction &MF,
99 uint64_t determineFrameLayout(const MachineFunction &MF,
107 void inlineStackProbe(MachineFunction &MF,
110 bool hasFP(const MachineFunction &MF) const override;
111 bool needsFP(const MachineFunction &MF) const;
112 void replaceFPWithRealFP(MachineFunction &MF) const;
114 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
116 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
128 assignCalleeSavedSpillSlots(MachineFunction &MF,
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H A DPPCRegisterInfo.h79 MachineFunction &MF) const override;
83 const MachineFunction &MF) const override;
87 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
93 BitVector getReservedRegs(const MachineFunction &MF) const override;
94 bool isAsmClobberable(const MachineFunction &MF,
97 const MachineFunction &MF) const override;
110 bool requiresRegisterScavenging(const MachineFunction &MF) const override { in requiresRegisterScavenging()
148 bool hasReservedSpillSlot(const MachineFunction &MF, Register Reg,
164 Register getFrameRegister(const MachineFunction &MF) const override;
167 Register getBaseRegister(const MachineFunction &MF) const;
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.h29 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
33 eliminateCallFramePseudoInstr(MachineFunction &MF,
37 bool hasReservedCallFrame(const MachineFunction &MF) const override;
38 bool hasFP(const MachineFunction &MF) const override;
39 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
42 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
52 void remapRegsForLeafProc(MachineFunction &MF) const;
55 bool isLeafProc(MachineFunction &MF) const;
59 void emitSPAdjustment(MachineFunction &MF,
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kFrameLowering.h43 uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
64 unsigned getPSPSlotOffsetFromSP(const MachineFunction &MF) const;
78 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
82 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
94 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
103 assignCalleeSavedSpillSlots(MachineFunction &MF,
128 bool hasFP(const MachineFunction &MF) const override;
135 bool hasReservedCallFrame(const MachineFunction &MF) const override;
141 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
150 bool needsFrameIndexResolution(const MachineFunction &MF) const override;
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/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.h24 void determineFrameLayout(MachineFunction &MF) const;
36 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
37 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
39 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
42 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
46 MachineFunction &MF, const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots()
64 bool hasFP(const MachineFunction &MF) const override;
65 bool hasBP(const MachineFunction &MF) const;
67 bool hasReservedCallFrame(const MachineFunction &MF) const override;
70 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMachineFunction.h27 MipsFunctionInfo(MachineFunction &MF) {} in MipsFunctionInfo()
30 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
40 Register getGlobalBaseReg(MachineFunction &MF);
41 Register getGlobalBaseRegForGlobalISel(MachineFunction &MF);
45 void initGlobalBaseReg(MachineFunction &MF);
61 void createEhDataRegsFI(MachineFunction &MF);
67 MachinePointerInfo callPtrInfo(MachineFunction &MF, const char *ES);
73 void createISRRegFI(MachineFunction &MF);
79 MachinePointerInfo callPtrInfo(MachineFunction &MF, const GlobalValue *GV);
84 int getMoveF64ViaSpillFI(MachineFunction &MF, const TargetRegisterClass *RC);

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