| /llvm-project-15.0.7/clang/test/CodeGenObjCXX/ |
| H A D | lambda-expressions.mm | 9 // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [5 x i8] c"copy\00" 10 // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [12 x i8] c"autorelease\00" 11 // MRC-LABEL: define{{.*}} i32 ()* @_Z1fv( 12 // MRC-LABEL: define internal noundef i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" 13 // MRC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) 17 // MRC: ret i32 ()* 30 // MRC: define{{.*}} void @_Z2f2v() [[NUW:#[0-9]+]] { 31 // MRC: store i8* bitcast (i32 (i8*)* @___Z2f2v_block_invoke to i8*), 32 // MRC-NOT: call 33 // MRC: ret void [all …]
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| /llvm-project-15.0.7/clang/test/Driver/ |
| H A D | objc-weak.m | 17 …g -target x86_64-apple-macos10.7 -S -### %s -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK 18 …4-apple-macos10.7 -S -### %s -fno-objc-weak -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK 19 // MRC-WEAK: -fobjc-weak 21 …et x86_64-apple-macosx10.7 -S -### %s -fno-objc-weak 2>&1 | FileCheck %s --check-prefix MRC-NO-WEAK 22 …ple-macosx10.7 -S -### %s -fobjc-weak -fno-objc-weak 2>&1 | FileCheck %s --check-prefix MRC-NO-WEAK 23 // MRC-NO-WEAK: -fno-objc-weak 25 …64-apple-macosx10.5 -S -### %s -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK-NOTSUPPORTED 26 …10.5 -S -### %s -fno-objc-weak -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK-NOTSUPPORTED 27 // MRC-WEAK-NOTSUPPORTED: error: -fobjc-weak is not supported on the current deployment target
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| /llvm-project-15.0.7/clang/test/CodeGenObjC/ |
| H A D | attr-noreturn.m | 1 …x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MRC 62 // CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}… 79 // CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}…
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| /llvm-project-15.0.7/clang/test/ARCMT/ |
| H A D | GC-no-arc-runtime.m | 7 // MRC __weak broke this test somehow.
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| /llvm-project-15.0.7/llvm/test/CodeGen/MIR/ARM/ |
| H A D | cfi-same-value.mir | 39 $r4 = MRC 15, 0, 13, 0, 3, 14, _
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 100 expandLoadStackGuardBase(MI, ARM::MRC, ARM::LDRi12); in expandLoadStackGuard()
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| H A D | ARMInstrInfo.td | 5617 def MRC : MovRCopro<"mrc", 1 /* from coprocessor to ARM core register */, 5621 ComplexDeprecationPredicate<"MRC">; 5623 (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, 5627 (MRC p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>; 5884 def : ARMPat<(ARMthread_pointer), (MRC 15, 0, 13, 0, 3)>,
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| H A D | ARMScheduleA57.td | 133 "(t2)?MCR(2|R|R2)?$", "(t2)?MRC(2)?$",
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| H A D | ARMBaseInstrInfo.cpp | 4918 if (LoadImmOpc == ARM::MRC || LoadImmOpc == ARM::t2MRC) { in expandLoadStackGuardBase() 4936 unsigned AddOpc = (LoadImmOpc == ARM::MRC) ? ARM::ADDri : ARM::t2ADDri; in expandLoadStackGuardBase()
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| H A D | ARMFrameLowering.cpp | 3115 BuildMI(McrMBB, DL, TII.get(Thumb ? ARM::t2MRC : ARM::MRC), in adjustForSegmentedStacks()
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| H A D | ARMISelDAGToDAG.cpp | 5525 Opcode = IsThumb2 ? ARM::t2MRC : ARM::MRC; in tryReadRegister()
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| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | thumb2-diagnostics.s | 35 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
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| H A D | diagnostics.s | 201 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
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| H A D | basic-thumb2-instructions.s | 1703 @ MRC/MRC2 1711 MRC P14, #0, R1, C1, C2, #4 1712 MRC P15, #7, APSR_NZCV, C15, C6, #6 1713 MRC P9, #1, R1, C2, C2
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| H A D | basic-arm-instructions.s | 1394 @ MRC/MRC2 1400 MRC P14, #0, R1, C1, C2, #4 1401 MRC P15, #7, APSR_NZCV, C15, C6, #6
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 263 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID); in printInst() local 266 if (MRC.contains(Reg)) { in printInst()
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | LangOptions.def | 322 LANGOPT(ObjCWeak , 1, 0, "Objective-C __weak in ARC and MRC files")
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | basic-arm-instructions.txt | 812 # MRC/MRC2
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| H A D | thumb2.txt | 1086 # MRC/MRC2
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 7446 const MCRegisterClass &MRC = MRI->getRegClass(ARM::GPRRegClassID); in ParseInstruction() local 7448 if (Op1.isReg() && Op2.isReg() && MRC.contains(Op1.getReg()) && in ParseInstruction() 7449 MRC.contains(Op2.getReg())) { in ParseInstruction()
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