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Searched refs:MO_RegisterMask (Results 1 – 25 of 27) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp69 case MachineOperand::MO_RegisterMask: in Lower()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcMCInstLower.cpp87 case MachineOperand::MO_RegisterMask: break; in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchMCInstLower.cpp54 case MachineOperand::MO_RegisterMask: in lowerLoongArchMachineOperandToMCOperand()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEMCInstLower.cpp71 case MachineOperand::MO_RegisterMask: in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCMCInstLower.cpp97 case MachineOperand::MO_RegisterMask: in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreMCInstLower.cpp96 case MachineOperand::MO_RegisterMask: in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYMCInstLower.cpp81 case MachineOperand::MO_RegisterMask: in lowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRMCInstLower.cpp95 case MachineOperand::MO_RegisterMask: in lowerInstruction()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430MCInstLower.cpp151 case MachineOperand::MO_RegisterMask: in Lower()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiMCInstLower.cpp112 case MachineOperand::MO_RegisterMask: in Lower()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineOperand.h63 MO_RegisterMask, ///< Mask of preserved registers. enumerator
344 bool isRegMask() const { return OpKind == MO_RegisterMask; } in isRegMask()
897 MachineOperand Op(MachineOperand::MO_RegisterMask); in CreateRegMask()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kMCInstLower.cpp139 case MachineOperand::MO_RegisterMask: in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMMCInstLower.cpp116 case MachineOperand::MO_RegisterMask: in lowerOperand()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMIRVRegNamerUtils.cpp110 case MachineOperand::MO_RegisterMask: in getInstructionOpcodeHash()
H A DMachineStableHash.cpp121 case MachineOperand::MO_RegisterMask: in stableHashValue()
H A DMachineOperand.cpp317 case MachineOperand::MO_RegisterMask: in isIdenticalTo()
384 case MachineOperand::MO_RegisterMask: in hash_value()
881 case MachineOperand::MO_RegisterMask: { in print()
H A DMIRPrinter.cpp913 case MachineOperand::MO_RegisterMask: { in print()
H A DMachineVerifier.cpp2167 case MachineOperand::MO_RegisterMask: in visitMachineOperand()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonMCInstLower.cpp133 case MachineOperand::MO_RegisterMask: in HexagonLowerToMC()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp201 case MachineOperand::MO_RegisterMask: in LowerPPCMachineOperandToMCOperand()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVMCInstLower.cpp102 case MachineOperand::MO_RegisterMask: in lowerRISCVMachineOperandToMCOperand()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.cpp102 case MachineOperand::MO_RegisterMask: in lowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMCInstLower.cpp197 case MachineOperand::MO_RegisterMask: in LowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64MCInstLower.cpp269 case MachineOperand::MO_RegisterMask: in lowerOperand()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp458 case MachineOperand::MO_RegisterMask: in LowerMachineOperand()

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