Searched refs:MODef (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineCopyPropagation.cpp | 547 if ((&MIDef != &MODef) && MIDef.isReg() && in hasOverlappingMultipleDef() 869 MachineOperand &MODef = MI.getOperand(OpIdx); in propagateDefs() local 871 if (!MODef.isReg() || MODef.isUse()) in propagateDefs() 875 if (MODef.isTied() || MODef.isUndef() || MODef.isImplicit()) in propagateDefs() 878 if (!MODef.getReg()) in propagateDefs() 882 if (!MODef.isRenamable()) in propagateDefs() 886 MI, MODef.getReg().asMCReg(), *TRI, *TII, UseCopyInstr); in propagateDefs() 895 if (MODef.getReg() != Src) in propagateDefs() 901 if (hasImplicitOverlap(MI, MODef)) in propagateDefs() 904 if (hasOverlappingMultipleDef(MI, MODef, Def)) in propagateDefs() [all …]
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| H A D | PeepholeOptimizer.cpp | 869 Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg()); in getNextRewritableSource() 912 Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg()); in getNextRewritableSource() 954 if (MODef.getSubReg()) in getNextRewritableSource() 957 Dst = RegSubRegPair(MODef.getReg(), in getNextRewritableSource() 1005 Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg()); in getNextRewritableSource() 1082 Dst.Reg = MODef.getReg(); in getNextRewritableSource() 1084 return MODef.getSubReg() == 0; in getNextRewritableSource() 1170 const MachineOperand &MODef = NewPHI.getOperand(0); in getNewSource() local 1171 return RegSubRegPair(MODef.getReg(), MODef.getSubReg()); in getNewSource() 1192 const MachineOperand &MODef = MI.getOperand(0); in optimizeCoalescableCopy() local [all …]
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| H A D | MachineVerifier.cpp | 2682 const MachineOperand &MODef = Phi.getOperand(0); in checkPHIOps() local 2683 if (!MODef.isReg() || !MODef.isDef()) { in checkPHIOps() 2684 report("Expected first PHI operand to be a register def", &MODef, 0); in checkPHIOps() 2687 if (MODef.isTied() || MODef.isImplicit() || MODef.isInternalRead() || in checkPHIOps() 2688 MODef.isEarlyClobber() || MODef.isDebug()) in checkPHIOps() 2689 report("Unexpected flag on PHI operand", &MODef, 0); in checkPHIOps() 2690 Register DefReg = MODef.getReg(); in checkPHIOps() 2692 report("Expected first PHI operand to be a virtual register", &MODef, 0); in checkPHIOps()
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| H A D | DetectDeadLanes.cpp | 386 const MachineOperand &MODef = *MRI->def_begin(MOReg); in determineInitialDefinedLanes() local 387 const MachineInstr &MODefMI = *MODef.getParent(); in determineInitialDefinedLanes()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 211 for (MachineOperand &MODef : Def->operands()) { in eraseInstrWithNoUses() 212 if ((!MODef.isReg()) || (!MODef.isDef())) in eraseInstrWithNoUses() 214 Register DefReg = MODef.getReg(); in eraseInstrWithNoUses()
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