Home
last modified time | relevance | path

Searched refs:M2 (Results 1 – 25 of 182) sorted by relevance

12345678

/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/intrinsics/
H A Dxtype_mpy.ll45 declare i64 @llvm.hexagon.M2.mmpyl.s0(i64, i64)
52 declare i64 @llvm.hexagon.M2.mmpyl.s1(i64, i64)
59 declare i64 @llvm.hexagon.M2.mmpyh.s0(i64, i64)
66 declare i64 @llvm.hexagon.M2.mmpyh.s1(i64, i64)
73 declare i64 @llvm.hexagon.M2.mmpyl.rs0(i64, i64)
80 declare i64 @llvm.hexagon.M2.mmpyl.rs1(i64, i64)
87 declare i64 @llvm.hexagon.M2.mmpyh.rs0(i64, i64)
94 declare i64 @llvm.hexagon.M2.mmpyh.rs1(i64, i64)
102 declare i64 @llvm.hexagon.M2.mmpyul.s0(i64, i64)
109 declare i64 @llvm.hexagon.M2.mmpyul.s1(i64, i64)
[all …]
H A Dxtype_complex.ll52 declare i64 @llvm.hexagon.M2.cmpys.s0(i32, i32)
59 declare i64 @llvm.hexagon.M2.cmpys.s1(i32, i32)
66 declare i64 @llvm.hexagon.M2.cmpysc.s0(i32, i32)
73 declare i64 @llvm.hexagon.M2.cmpysc.s1(i32, i32)
137 declare i64 @llvm.hexagon.M2.cmpyi.s0(i32, i32)
144 declare i64 @llvm.hexagon.M2.cmpyr.s0(i32, i32)
166 declare i32 @llvm.hexagon.M2.cmpyrs.s0(i32, i32)
173 declare i32 @llvm.hexagon.M2.cmpyrs.s1(i32, i32)
180 declare i32 @llvm.hexagon.M2.cmpyrsc.s0(i32, i32)
187 declare i32 @llvm.hexagon.M2.cmpyrsc.s1(i32, i32)
[all …]
/llvm-project-15.0.7/clang/unittests/Driver/
H A DMultilibTest.cpp53 Multilib M1, M2; in TEST() local
55 M2.flag("+foo"); in TEST()
60 Multilib M1, M2; in TEST() local
62 M2.flag("-foo"); in TEST()
69 Multilib M1, M2; in TEST() local
70 M2.flag("+foo"); in TEST()
75 Multilib M1, M2; in TEST() local
85 Multilib M2; in TEST() local
95 Multilib M2; in TEST() local
105 Multilib M2; in TEST() local
[all …]
/llvm-project-15.0.7/llvm/unittests/Support/
H A DMemoryTest.cpp77 if (M1.base() == M2.base()) in doesOverlap()
80 if (M1.base() > M2.base()) in doesOverlap()
81 return (unsigned char *)M2.base() + M2.allocatedSize() > M1.base(); in doesOverlap()
139 EXPECT_LE(64U, M2.allocatedSize()); in TEST_P()
143 EXPECT_FALSE(doesOverlap(M1, M2)); in TEST_P()
144 EXPECT_FALSE(doesOverlap(M2, M3)); in TEST_P()
196 EXPECT_FALSE(doesOverlap(M1, M2)); in TEST_P()
197 EXPECT_FALSE(doesOverlap(M2, M3)); in TEST_P()
210 int *y = (int*)M2.base(); in TEST_P()
270 EXPECT_FALSE(doesOverlap(M1, M2)); in TEST_P()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dselect-int.ll2 ; RUN: -check-prefixes=ALL,M2,M2-M3
40 ; M2-M3: nop
42 ; M2-M3: [[BB0]]:
76 ; M2-M3: nop
78 ; M2-M3: [[BB0]]:
112 ; M2-M3: nop
114 ; M2-M3: [[BB0]]:
148 ; M2: nop
150 ; M2: $[[BB0]]:
153 ; M2: nop
[all …]
H A Dselect-flt.ll38 ; M2-NEXT: nop
40 ; M2-NEXT: jr $ra
42 ; M2-NEXT: $BB0_2:
124 ; M2-NEXT: nop
192 ; M2-NEXT: nop
199 ; M2-NEXT: nop
268 ; M2-NEXT: nop
275 ; M2-NEXT: nop
344 ; M2-NEXT: nop
351 ; M2-NEXT: nop
[all …]
H A Dselect-dbl.ll3 ; RUN: -check-prefix=M2
39 ; M2-NEXT: nop
43 ; M2-NEXT: nop
44 ; M2-NEXT: $BB0_2:
133 ; M2-NEXT: nop
206 ; M2-NEXT: nop
213 ; M2-NEXT: nop
288 ; M2-NEXT: nop
295 ; M2-NEXT: nop
370 ; M2-NEXT: nop
[all …]
H A Dmul.ll34 ; M2: mult $4, $5
37 ; M2: negu $2, $[[T0]]
73 ; M2: mult $4, $5
114 ; M2: mult $4, $5
155 ; M2: mult $4, $5
156 ; M2: mflo $2
177 ; M2: mult $4, $7
179 ; M2: mult $5, $6
181 ; M2: multu $5, $7
182 ; M2: mflo $3
[all …]
/llvm-project-15.0.7/libcxx/test/std/experimental/memory/memory.resource/memory.resource.public/
H A Dis_equal.pass.cpp53 memory_resource const& M2 = R2; in main() local
55 assert(M1.is_equal(M2) == false); in main()
59 assert(M2.is_equal(M1) == false); in main()
70 memory_resource const& M2 = R2; in main() local
72 assert(M1.is_equal(M2) == false); in main()
76 assert(M2.is_equal(M1) == false); in main()
87 memory_resource const& M2 = R2; in main() local
89 assert(M1.is_equal(M2) == true); in main()
93 assert(M2.is_equal(M1) == true); in main()
/llvm-project-15.0.7/clang/test/Preprocessor/
H A Dbigoutput.c9 #define M2 M0 M0 M0 M0 macro
10 #define M4 M2 M2 M2 M2
H A Dmacro_rescan.c4 #define M2(b) b macro
6 int ei_1 = M2(M1)(17);
9 int ei_2 = (M2(M1))(17);
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Ddisable-const64-tinycore.ll22 %8 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 undef, i64 29819854865948160, i64 %7)
31 %14 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 undef, i64 undef, i64 %13)
32 %15 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 %8, i64 282574488406740992, i64 %7)
36 %19 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 %15, i64 7661056, i64 %7)
48 %25 = tail call i64 @llvm.hexagon.M2.mmpyl.s0(i64 0, i64 undef)
52 %29 = tail call i64 @llvm.hexagon.M2.mmpyh.s0(i64 %28, i64 undef)
53 %30 = tail call i64 @llvm.hexagon.M2.mmpyl.s0(i64 %27, i64 3998767301)
85 declare i64 @llvm.hexagon.M2.mmachs.s1(i64, i64, i64)
86 declare i64 @llvm.hexagon.M2.mmacls.s1(i64, i64, i64)
87 declare i64 @llvm.hexagon.M2.mmpyh.s0(i64, i64)
[all …]
H A Dbug-hcp-tied-kill.ll25 %v0 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 0, i32 2147483647)
27 %v2 = tail call i32 @llvm.hexagon.M2.maci(i32 -2147483648, i32 1, i32 2147483647)
29 %v4 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 1, i32 2147483647)
31 %v6 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 1, i32 2147483647)
33 %v8 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 1, i32 2147483647)
35 %v10 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 1, i32 2147483647)
39 %v14 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 2147483647, i32 2147483647)
41 %v16 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 2147483647, i32 2147483647)
43 %v18 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 2147483647, i32 2147483647)
45 %v20 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 2147483647, i32 2147483647)
[all …]
H A Dswp-phi-chains.ll76 %v35 = tail call i32 @llvm.hexagon.M2.mpy.nac.sat.ll.s1(i32 %v12, i32 %v34, i32 %v34)
79 %v38 = tail call i32 @llvm.hexagon.M2.mpy.nac.sat.ll.s1(i32 %v35, i32 %v37, i32 %v37)
83 %v41 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v11, i32 %v40, i32 %v34)
86 %v44 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v41, i32 %v43, i32 %v37)
88 %v45 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v10, i32 %v43, i32 %v34)
89 %v46 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v45, i32 %v40, i32 %v37)
91 %v47 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v9, i32 %v40, i32 0)
94 %v50 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v47, i32 %v43, i32 %v49)
96 %v51 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v8, i32 %v43, i32 0)
122 declare i32 @llvm.hexagon.M2.mpy.nac.sat.ll.s1(i32, i32, i32) #1
[all …]
H A Dswp-epilog-phi13.ll31 %v9 = call i32 @llvm.hexagon.M2.mpy.ll.s0(i32 %v8, i32 %v8) #2
32 %v92 = call i32 @llvm.hexagon.M2.mpy.ll.s0(i32 %v9, i32 %v9) #2
33 %v93 = call i32 @llvm.hexagon.M2.mpy.ll.s0(i32 %v92, i32 %v92) #2
34 %v11 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32 %v8, i32 undef, i32 undef) #2
50 declare i32 @llvm.hexagon.M2.mpy.ll.s0(i32, i32) #1
53 declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32, i32, i32) #1
H A Ddisable-const64.ll13 %1 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 10230955697128160, i64 10230955697128160, i64 0)
24 %1 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 undef, i64 30432282833584128, i64 %conv)
32 declare i64 @llvm.hexagon.M2.mmachs.s1(i64, i64, i64)
33 declare i64 @llvm.hexagon.M2.mmacls.s1(i64, i64, i64)
H A Dvrcmpys.ll14 %v4 = tail call i64 @llvm.hexagon.M2.vrcmpys.acc.s1(i64 %v1, i64 %v3, i32 %a0)
20 declare i64 @llvm.hexagon.M2.vrcmpys.acc.s1(i64, i64, i32) #0
30 %v4 = tail call i64 @llvm.hexagon.M2.vrcmpys.acc.s1(i64 %v1, i64 %v3, i32 %a1)
41 %v2 = tail call i64 @llvm.hexagon.M2.vrcmpys.s1(i64 %v1, i32 %a0)
47 declare i64 @llvm.hexagon.M2.vrcmpys.s1(i64, i32) #0
55 %v2 = tail call i64 @llvm.hexagon.M2.vrcmpys.s1(i64 %v1, i32 %a1)
/llvm-project-15.0.7/llvm/test/TableGen/
H A DMultiClass-def-fail.td5 multiclass M2 {
9 // CHECK: error: Couldn't find class 'M2'. Use 'defm' if you meant to use multiclass 'M2'
10 def rec1 : M2;
/llvm-project-15.0.7/clang/test/CoverageMapping/
H A Dmacro-expansion.c24 #define M2(x) do { if (x) {} } while (0) macro
30 #define M3(x) do { M2(x); } while (0)
60 M2(!x); in func()
61 M2(x); in func()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dvec_zero_cse.ll8 @M2 = external dso_local global <2 x i32>
19 ; X32-NEXT: movlps %xmm0, M2
25 ; X64-NEXT: movq $0, M2(%rip)
28 store <2 x i32> zeroinitializer, ptr @M2
38 ; X32-NEXT: movq %xmm0, M2
44 ; X64-NEXT: movq $-1, M2(%rip)
47 store <2 x i32> < i32 -1, i32 -1 >, ptr @M2
/llvm-project-15.0.7/clang/test/PCH/
H A Dmacro-redef.c14 #define M2 3 macro
19 #define M2 4 // expected-warning {{redefined}} macro
26 int x = M2; // expected-error {{redefinition}}
/llvm-project-15.0.7/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.scoped/
H A Dtypes.pass.cpp57 using M2 = std::recursive_mutex; in main() typedef
58 using T = std::scoped_lock<M1, M2>; in main()
63 using M2 = std::recursive_mutex; in main() typedef
64 using T = std::scoped_lock<M1, M1, M2>; in main()
/llvm-project-15.0.7/llvm/test/Transforms/NewGVN/
H A Dcommute.ll37 ; CHECK-NEXT: [[M2:%.*]] = call i32 @llvm.smax.i32(i32 [[Y]], i32 [[X]])
38 ; CHECK-NEXT: call void @use(i32 [[M1]], i32 [[M2]])
53 ; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
54 ; CHECK-NEXT: [[R:%.*]] = sub i16 [[M1]], [[M2]]
66 ; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
67 ; CHECK-NEXT: [[R:%.*]] = sub i16 [[M1]], [[M2]]
81 ; CHECK-NEXT: [[M2:%.*]] = call float @llvm.fma.f32(float [[Y]], float [[X]], float 1.000000e+00)
82 ; CHECK-NEXT: [[R:%.*]] = fdiv nnan float [[M1]], [[M2]]
/llvm-project-15.0.7/clang/test/Import/builtin-template/
H A Dtest.cpp19 typedef MakeSeq<long, 4> M2; in expr() typedef
20 M2 m2; in expr()
22 static_assert(M2::PackSize == 4, ""); in expr()
/llvm-project-15.0.7/clang/lib/Driver/
H A DMultilib.cpp152 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2) { in Either() argument
153 return Either({M1, M2}); in Either()
156 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
158 return Either({M1, M2, M3}); in Either()
161 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
163 return Either({M1, M2, M3, M4}); in Either()
166 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
169 return Either({M1, M2, M3, M4, M5}); in Either()

12345678