Home
last modified time | relevance | path

Searched refs:Low (Results 1 – 25 of 122) sorted by relevance

12345

/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DLowerSwitch.cpp55 int64_t Low, High; member
70 return I != Ranges.end() && I->Low <= R.Low; in IsInRanges()
74 ConstantInt *Low; member
167 if (Leaf.Low == Leaf.High) { in NewLeafBlock()
173 if (Leaf.Low == LowerBound) { in NewLeafBlock()
418 APInt Low = Cases.front().Low->getValue(); in ProcessSwitchInst() local
439 int64_t Low = I.Low->getSExtValue(); in ProcessSwitchInst() local
443 if (LastRange.Low == Low) { in ProcessSwitchInst()
448 assert(Low > LastRange.Low); in ProcessSwitchInst()
449 LastRange.High = Low - 1; in ProcessSwitchInst()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DSwitchLoweringUtils.cpp76 const APInt &Lo = Clusters[i].Low->getValue(); in findJumpTables()
209 const APInt &Low = Clusters[I].Low->getValue(); in buildJumpTable() local
211 NumCmps += (Low == High) ? 1 : 2; in buildJumpTable()
215 assert(PreviousHigh.slt(Low)); in buildJumpTable()
381 APInt Low = Clusters[First].Low->getValue(); in buildBitTests() local
383 assert(Low.slt(High)); in buildBitTests()
392 assert(TLI->rangeFitsInWord(Low, High, *DL) && in buildBitTests()
412 LowBound = Low; in buildBitTests()
413 CmpRange = High - Low; in buildBitTests()
471 return a.Low->getValue().slt(b.Low->getValue()); in sortAndRangeify()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DSwitchLoweringUtils.h44 const ConstantInt *Low, *High; member
52 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High, in range()
56 C.Low = Low; in range()
63 static CaseCluster jumpTable(const ConstantInt *Low, const ConstantInt *High, in jumpTable()
67 C.Low = Low; in jumpTable()
74 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High, in bitTests()
78 C.Low = Low; in bitTests()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZMachineFunctionInfo.h53 void setSpillGPRRegs(Register Low, Register High, unsigned Offs) { in setSpillGPRRegs() argument
54 SpillGPRRegs.LowGPR = Low; in setSpillGPRRegs()
63 void setRestoreGPRRegs(Register Low, Register High, unsigned Offs) { in setRestoreGPRRegs() argument
64 RestoreGPRRegs.LowGPR = Low; in setRestoreGPRRegs()
/llvm-project-15.0.7/llvm/test/tools/obj2yaml/Minidump/
H A Dbasic.yaml33 File Version Low: 0x1C1D1E1F
35 Product Version Low: 0x24252627
42 File Date Low: 0x40414243
122 # CHECK-NEXT: File Version Low: 0x1C1D1E1F
124 # CHECK-NEXT: Product Version Low: 0x24252627
131 # CHECK-NEXT: File Date Low: 0x40414243
/llvm-project-15.0.7/clang/test/Index/
H A Dcomplete-type-factors.m8 Low,
32 [A method:Red priority:Low];
43 // CHECK-CC1: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (32)
57 // CHECK-CC2: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (65)
73 // CHECK-CC3: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (16)
89 // CHECK-CC4: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (65)
107 // CHECK-CC6: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (65)
121 // CHECK-CC7: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (65)
133 // CHECK-CC8: EnumConstantDecl:{ResultType enum Priority}{TypedText Low} (16)
/llvm-project-15.0.7/llvm/test/Analysis/LoopAccessAnalysis/
H A Dmemcheck-off-by-one-error.ll15 ; (Low: %src High: (24 + %src))
22 ;CHECK: (Low: %op High: (32 + %op))
23 ;CHECK: (Low: %src High: (32 + %src))
H A Dnumber-of-memchecks.ll98 ; CHECK-NEXT: (Low: %c High: (80 + %c))
102 ; CHECK-NEXT: (Low: %a High: (42 + %a))
106 ; CHECK-NEXT: (Low: %b High: (40 + %b))
170 ; CHECK-NEXT: (Low: %c High: (80 + %c))
174 ; CHECK-NEXT: (Low: %a High: (42 + %a))
178 ; CHECK-NEXT: (Low: %b High: (40 + %b))
249 ; CHECK-NEXT: (Low: ((2 * %offset) + %a) High: (10000 + (2 * %offset) + %a))
252 ; CHECK-NEXT: (Low: %a High: (10000 + %a))
255 ; CHECK-NEXT: (Low: (20000 + %a) High: (30000 + %a))
H A Dforked-pointers.ll25 ; CHECK-NEXT: (Low: %Dest High: (400 + %Dest))
29 ; CHECK-NEXT: (Low: %Base1 High: (400 + %Base1))
32 ; CHECK-NEXT: (Low: %Base2 High: (400 + %Base2))
84 ; CHECK-NEXT: (Low: %Dest High: (400 + %Dest))
87 ; CHECK-NEXT: (Low: %Preds High: (400 + %Preds))
90 ; CHECK-NEXT: (Low: %Base2 High: (400 + %Base2))
93 ; CHECK-NEXT: (Low: %Base1 High: (400 + %Base1))
171 ; CHECK-NEXT: (Low: %Dest High: (800 + %Dest))
232 ; CHECK-NEXT: (Low: %Dest High: (399 + %Dest))
293 ; CHECK-NEXT: (Low: %Dest High: (100 + %Dest))
[all …]
H A Dmemcheck-store-vs-alloc-size.ll9 ;CHECK: (Low: %op High: (27 + %op))
10 ;CHECK: (Low: %src High: (27 + %src))
H A Dpointer-phis.ll232 ; CHECK-NEXT: (Low: %C High: (8 + %C))
235 ; CHECK-NEXT: (Low: %B High: (8 + %B))
238 ; CHECK-NEXT: (Low: %A High: (256000 + %A))
309 ; CHECK-NEXT: (Low: %C High: (8 + %C))
312 ; CHECK-NEXT: (Low: %B High: (8 + %B))
315 ; CHECK-NEXT: (Low: %A High: (256000 + %A))
463 ; CHECK-NEXT: (Low: %A High: (2 + %A))
467 ; CHECK-NEXT: (Low: %C High: (2 + %C))
471 ; CHECK-NEXT: (Low: %B High: (2 + %B))
H A Dreverse-memcheck-bounds.ll18 ; CHECK: (Low: (20000 + %a)<nuw> High: (60004 + %a))
60 ; CHECK: Low: ((60000 + %a) umin (60000 + (-40000 * %step) + %a))
/llvm-project-15.0.7/llvm/lib/IR/
H A DIntrinsicInst.cpp187 const char *const *Low = NameTable.begin(); in lookupLLVMIntrinsicByName() local
189 const char *const *LastLow = Low; in lookupLLVMIntrinsicByName()
190 while (CmpEnd < Name.size() && High - Low > 0) { in lookupLLVMIntrinsicByName()
197 LastLow = Low; in lookupLLVMIntrinsicByName()
198 std::tie(Low, High) = std::equal_range(Low, High, Name.data(), Cmp); in lookupLLVMIntrinsicByName()
200 if (High - Low > 0) in lookupLLVMIntrinsicByName()
201 LastLow = Low; in lookupLLVMIntrinsicByName()
/llvm-project-15.0.7/lld/test/ELF/
H A Dgdb-index-ranges.s8 # CHECK-NEXT: Low/High address = [0x201120, 0x201121) (Size: 0x1), CU id = 0
9 # CHECK-NEXT: Low/High address = [0x201121, 0x201123) (Size: 0x2), CU id = 0
H A Dgdb-index-base-addr.s8 # CHECK-NEXT: Low/High address = [0x201120, 0x201121) (Size: 0x1), CU id = 0
9 # CHECK-NEXT: Low/High address = [0x201123, 0x201126) (Size: 0x3), CU id = 0
H A Dgdb-index-icf.s11 # CHECK-NEXT: Low/High address = [0x1001, 0x1002) (Size: 0x1), CU id = 0
12 # CHECK-NEXT: Low/High address = [0x1001, 0x1002) (Size: 0x1), CU id = 1
/llvm-project-15.0.7/bolt/test/X86/
H A Dgdbindex.test27 ; CHECK-NEXT: Low/High address = [0x20117c, 0x201187) (Size: 0xb), CU id = 0
28 ; CHECK-NEXT: Low/High address = [0x201188, 0x201193) (Size: 0xb), CU id = 1
/llvm-project-15.0.7/llvm/test/DebugInfo/
H A Ddwarfdump-dump-gdbindex.test23 ; CHECK-NEXT: Low/High address = [0x4000e8, 0x4000f3) (Size: 0xb), CU id = 0
24 ; CHECK-NEXT: Low/High address = [0x4000f3, 0x4000fe) (Size: 0xb), CU id = 1
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVVMIntrRange.cpp61 static bool addRangeMetadata(uint64_t Low, uint64_t High, CallInst *C) { in addRangeMetadata() argument
69 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Low)), in addRangeMetadata()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp466 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::isub_lo); in HexagonProcessInstruction() local
469 TmpInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
543 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo); in HexagonProcessInstruction() local
546 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
555 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo); in HexagonProcessInstruction() local
558 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
569 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo); in HexagonProcessInstruction() local
572 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dload-slice.ll14 ; Low High
16 ; Low slice starts at 0 (base) and is 8-bytes aligned.
85 ; Low High
87 ; Low slice starts at 0 (base) and is 8-bytes aligned.
/llvm-project-15.0.7/clang-tools-extra/clangd/index/
H A DBackground.h75 llvm::ThreadPriority ThreadPri = llvm::ThreadPriority::Low;
140 llvm::ThreadPriority IndexingPriority = llvm::ThreadPriority::Low;
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dinlineasm-constraint-m-2.ll47 ; "L": Low-order word of a double word.
64 ; Low-order part.
/llvm-project-15.0.7/libclc/generic/lib/integer/
H A Dmad_sat.cl45 /* Low overflow in mul and z not neg enough to correct it */
51 /* Low overflow in mul and z not pos enough to correct it */
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVERegisterInfo.td50 def sub_i32 : SubRegIndex<32, 32>; // Low 32 bit (32..63)
53 def sub_odd : SubRegIndex<64, 64>; // Low 64 bit (64..127)
55 def sub_vm_odd : SubRegIndex<256, 256>; // Low 256 bit (256..511)

12345