Home
last modified time | relevance | path

Searched refs:Load0 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp175 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
178 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
181 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr()
191 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
195 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
223 unsigned NumOps = getNumOperandsNoGlue(Load0); in areLoadsFromSameBasePtr()
228 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
233 if (NumOps == 5 && Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
237 dyn_cast<ConstantSDNode>(Load0->getOperand(NumOps - 3)); in areLoadsFromSameBasePtr()
255 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc)) in areLoadsFromSameBasePtr()
[all …]
H A DSIInstrInfo.h205 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp2160 SDValue Load0 = DAG.getLoad(SingleTy, dl, Chain, Base0, MOp0); in SplitHvxMemOp() local
2163 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
2165 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
H A DHexagonISelLowering.cpp3084 SDValue Load0 = DAG.getLoad(LoadTy, dl, Chain, Base0, WideMMO); in LowerUnalignedLoad() local
3088 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
3090 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13414 LoadSDNode *Load0 = dyn_cast<LoadSDNode>(N0); in TryDistrubutionADDVecReduce() local
13416 if (!Load0 || !Load1 || Load0->getChain() != Load1->getChain() || in TryDistrubutionADDVecReduce()
13417 !Load0->isSimple() || !Load1->isSimple() || Load0->isIndexed() || in TryDistrubutionADDVecReduce()
13421 auto BaseLocDecomp0 = BaseIndexOffset::match(Load0, DAG); in TryDistrubutionADDVecReduce()