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Searched refs:Lo2 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dwarn-bitfield-enum-conversion.cpp5 enum TwoBitsSigned { Lo2 = -2, Hi2 = 1 } two_bits_signed; enumerator
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp753 SDValue Lo2 = Node->getOperand(4); in trySelect() local
755 SDValue ops[] = {cond, Hi1, Lo1, Hi2, Lo2}; in trySelect()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.td4919 dag Lo2 = (ORI (LIS 0x3333), 0x3333);
4941 dag Bits = (OR (AND Shift2.Right, MaskValues.Lo2),
4987 dag Lo2 = (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), MaskValues.Lo2, sub_32));
4996 dag Lo2 = (ORI8 (ORIS8 (RLDICR MaskValues64.Lo2, 32, 31), 0x3333), 0x3333);
5005 dag Swap2 = (OR8 (AND8 (RLDICL Swap1, 62, 2), DWMaskValues.Lo2),
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp358 MachineOperand Lo2(getSubOperand64(I.getOperand(2), HalfRC, AMDGPU::sub0)); in selectG_ADD_SUB() local
368 .add(Lo2); in selectG_ADD_SUB()
378 .add(Lo2) in selectG_ADD_SUB()
H A DSIISelLowering.cpp4630 SDValue Lo2, Hi2; in splitTernaryVectorOp() local
4631 std::tie(Lo2, Hi2) = DAG.SplitVectorOperand(Op.getNode(), 2); in splitTernaryVectorOp()
4636 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, in splitTernaryVectorOp()