Searched refs:LSUnit (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/ |
| H A D | LSUnit.cpp | 69 unsigned LSUnit::dispatch(const InstRef &IR) { in dispatch()
196 LSUnit::Status LSUnit::isAvailable(const InstRef &IR) const { in isAvailable()
199 return LSUnit::LSU_LQUEUE_FULL; in isAvailable()
201 return LSUnit::LSU_SQUEUE_FULL; in isAvailable()
202 return LSUnit::LSU_AVAILABLE; in isAvailable()
233 void LSUnit::onInstructionExecuted(const InstRef &IR) { in onInstructionExecuted()
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| H A D | Scheduler.cpp | 55 LSUnit::Status LSS = LSU.isAvailable(IR); in isAvailable()
56 HadTokenStall = LSS != LSUnit::LSU_AVAILABLE; in isAvailable()
59 case LSUnit::LSU_LQUEUE_FULL: in isAvailable()
61 case LSUnit::LSU_SQUEUE_FULL: in isAvailable()
63 case LSUnit::LSU_AVAILABLE: in isAvailable()
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| /llvm-project-15.0.7/llvm/include/llvm/MCA/HardwareUnits/ |
| H A D | LSUnit.h | 401 class LSUnit : public LSUnitBase {
446 LSUnit(const MCSchedModel &SM) in LSUnit() function
447 : LSUnit(SM, /* LQSize */ 0, /* SQSize */ 0, /* NoAlias */ false) {} in LSUnit()
448 LSUnit(const MCSchedModel &SM, unsigned LQ, unsigned SQ) in LSUnit() function
449 : LSUnit(SM, LQ, SQ, /* NoAlias */ false) {} in LSUnit()
450 LSUnit(const MCSchedModel &SM, unsigned LQ, unsigned SQ, bool AssumeNoAlias) in LSUnit() function
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| /llvm-project-15.0.7/llvm/include/llvm/MCA/Stages/ |
| H A D | InOrderIssueStage.h | 24 class LSUnit; variable
59 LSUnit &LSU;
116 CustomBehaviour &CB, LSUnit &LSU);
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| /llvm-project-15.0.7/llvm/lib/MCA/ |
| H A D | Context.cpp | 42 auto LSU = std::make_unique<LSUnit>(SM, Opts.LoadQueueSize, in createDefaultPipeline()
77 auto LSU = std::make_unique<LSUnit>(SM, Opts.LoadQueueSize, in createInOrderPipeline()
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| H A D | CMakeLists.txt | 7 HardwareUnits/LSUnit.cpp
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| /llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/MCA/ |
| H A D | BUILD.gn | 15 "HardwareUnits/LSUnit.cpp",
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| /llvm-project-15.0.7/llvm/docs/CommandGuide/ |
| H A D | llvm-mca.rst | 915 utilizes a simulated load/store unit (LSUnit) to simulate the speculative
922 The LSUnit implements a relaxed consistency model for memory loads and stores.
932 By default, the LSUnit optimistically assumes that loads do not alias
934 always allowed to pass older stores. Essentially, the LSUnit does not attempt
947 * The LSUnit does not know when store-to-load forwarding may occur.
948 * The LSUnit does not know anything about cache hierarchy and memory types.
949 * The LSUnit does not know how to identify serializing operations and memory
952 The LSUnit does not attempt to predict if a load or store hits or misses the L1
958 memory-barrier like instructions. The LSUnit used to conservatively use an
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| /llvm-project-15.0.7/llvm/lib/MCA/Stages/ |
| H A D | InOrderIssueStage.cpp | 48 LSUnit &LSU) in InOrderIssueStage()
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