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Searched refs:LS0 (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX3T110.td290 // 1 cycle on LS0/LS1.
296 // 2 cycles on LS0/LS1.
302 // 4 cycles on LS0/LS1.
309 // 5 cycles on LS0/LS1.
315 // 6 cycles on LS0/LS1.
321 // 4 + 5 cycles on LS0/LS1.
331 // 4 + 8 cycles on LS0/LS1.
404 // 1 cycle on LS0/LS1 and SD.
411 // 2 cycles on LS0/LS1 and SD.
418 // 4 cycles on LS0/LS1 and SD.
[all …]
H A DAArch64SchedThunderX2T99.td213 // 1 cycles on LS0 or LS1.
218 // 1 cycles on LS0 or LS1 and I0, I1, or I2.
231 // 2 cycles on LS0 or LS1.
237 // 4 cycles on LS0 or LS1.
243 // 5 cycles on LS0 or LS1.
249 // 6 cycles on LS0 or LS1.
294 // 1 cycles on LS0 or LS1 and F0 or F1.
300 // 5 cycles on LS0 or LS1 and F0 or F1.
306 // 6 cycles on LS0 or LS1 and F0 or F1.
312 // 7 cycles on LS0 or LS1 and F0 or F1.
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGAddressAnalysis.cpp298 if (const auto *LS0 = dyn_cast<LSBaseSDNode>(N)) in match() local
299 return matchLSNode(LS0, DAG); in match()