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/llvm-project-15.0.7/llvm/test/Instrumentation/AddressSanitizer/
H A Dasan-optimize-callbacks.ll17 ; LOAD-NEXT: %n1 = load i8, i8* %p1, align 1
18 ; LOAD-NEXT: %1 = bitcast i16* %p2 to i8*
20 ; LOAD-NEXT: %n2 = load i16, i16* %p2, align 2
21 ; LOAD-NEXT: %2 = bitcast i32* %p4 to i8*
23 ; LOAD-NEXT: %n4 = load i32, i32* %p4, align 4
24 ; LOAD-NEXT: %3 = bitcast i64* %p8 to i8*
26 ; LOAD-NEXT: %n8 = load i64, i64* %p8, align 8
27 ; LOAD-NEXT: %4 = bitcast i128* %p16 to i8*
33 ; LOAD-KERNEL-NEXT: %1 = bitcast i16* %p2 to i8*
36 ; LOAD-KERNEL-NEXT: %2 = bitcast i32* %p4 to i8*
[all …]
H A Dasan-masked-load-store.ll148 ;;;;;;;;;;;;;;;; LOAD
206 ; LOAD: [[THEN0]]:
210 ; LOAD: br label %[[AFTER0]]
211 ; LOAD: [[AFTER0]]:
215 ; LOAD: [[THEN1]]:
219 ; LOAD: br label %[[AFTER1]]
220 ; LOAD: [[AFTER1]]:
224 ; LOAD: [[THEN2]]:
229 ; LOAD: [[AFTER2]]:
233 ; LOAD: [[THEN3]]:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-widen-scalar-loads.mir17 ; GFX8-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
23 ; GFX9-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
29 ; GFX10-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
46 ; GFX8-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
52 ; GFX9-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
58 ; GFX10-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
75 ; GFX8-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
81 ; GFX9-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
87 ; GFX10-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
239 ; GFX8-NEXT: S_ENDPGM 0, implicit [[LOAD]](s32)
[all …]
H A Dinst-select-load-atomic-local.mir62 ; GFX6-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
69 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
75 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
99 ; GFX6-NEXT: $vgpr0 = COPY [[LOAD]](p3)
106 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](p3)
112 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](p3)
247 ; GFX6-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
254 ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
260 ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
284 ; GFX6-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p0)
[all …]
H A Dinst-select-load-atomic-flat.mir64 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
70 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
76 ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
82 ; GFX11-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
105 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](p3)
111 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](p3)
117 ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](p3)
123 ; GFX11-NEXT: $vgpr0 = COPY [[LOAD]](p3)
269 ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
275 ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
[all …]
H A Dinst-select-load-global.s96.mir76 …; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspac…
77 ; GFX7-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
83 ; GFX7-FLAT-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
89 ; GFX8-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
95 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
101 ; GFX10-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
124 ; GFX7-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
130 ; GFX7-FLAT-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
136 ; GFX8-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
142 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
[all …]
H A Dinst-select-load-atomic-global.mir82 ; GFX6-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
88 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
100 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](<2 x s16>)
129 ; GFX6-NEXT: $vgpr0 = COPY [[LOAD]](p3)
135 ; GFX7-NEXT: $vgpr0 = COPY [[LOAD]](p3)
141 ; GFX7-FLAT-NEXT: $vgpr0 = COPY [[LOAD]](p3)
147 ; GFX9-NEXT: $vgpr0 = COPY [[LOAD]](p3)
153 ; GFX10-NEXT: $vgpr0 = COPY [[LOAD]](p3)
327 ; GFX6-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
333 ; GFX7-NEXT: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Dseparate-segments.s8 # NONE: LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000245 0x000245 R 0x1000
9 # NONE-NEXT: LOAD 0x000248 0x0000000000001248 0x0000000000001248 0x000001 0x000001 R E 0x1000
10 # NONE-NEXT: LOAD 0x000250 0x0000000000002250 0x0000000000002250 0x000090 0x000090 RW 0x1000
11 # NONE-NEXT: LOAD 0x0002e0 0x00000000000032e0 0x00000000000032e0 0x000001 0x000001 RW 0x1000
17 # CODE: LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000245 0x000245 R 0x1000
18 # CODE-NEXT: LOAD 0x001000 0x0000000000001000 0x0000000000001000 0x000001 0x000001 R E 0x1000
19 # CODE-NEXT: LOAD 0x002000 0x0000000000002000 0x0000000000002000 0x000090 0x000090 RW 0x1000
20 # CODE-NEXT: LOAD 0x002090 0x0000000000003090 0x0000000000003090 0x000001 0x000001 RW 0x1000
25 # ALL: LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x000245 0x000245 R 0x1000
26 # ALL-NEXT: LOAD 0x001000 0x0000000000001000 0x0000000000001000 0x000001 0x000001 R E 0x1000
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/MachO/
H A Dinstall-name-tool-change.test7 # RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/long/long/dylib/LOAD %t.copy
10 # CHANGE: name /usr/long/long/dylib/LOAD
16 # RUN: -change /usr/dylib/LOAD /usr/sh/LOAD %t.copy
19 # CHANGE-MULTIPLE: name /usr/sh/LOAD
24 # RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/LOAD \
28 # CHANGE-REPEAT: name /usr/LOAD
33 # RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/XX/LOAD \
34 # RUN: -change /usr/XX/LOAD /usr/YY/LOAD %t.copy
37 # CHANGE-CHAIN: name /usr/XX/LOAD
42 # RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/JOJO/LOAD \
[all …]
/llvm-project-15.0.7/llvm/test/Instrumentation/HeapProfiler/
H A Dmasked-load-store.ll134 ;;;;;;;;;;;;;;;; LOAD
192 ; LOAD: [[THEN0]]:
196 ; LOAD: br label %[[AFTER0]]
197 ; LOAD: [[AFTER0]]:
201 ; LOAD: [[THEN1]]:
205 ; LOAD: br label %[[AFTER1]]
206 ; LOAD: [[AFTER1]]:
210 ; LOAD: [[THEN2]]:
215 ; LOAD: [[AFTER2]]:
219 ; LOAD: [[THEN3]]:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/legalizer/
H A Dload_4_unaligned.mir73 ; MIPS32: $f0 = COPY [[LOAD]](s32)
78 ; MIPS32R6: $f0 = COPY [[LOAD]](s32)
95 ; MIPS32: $f0 = COPY [[LOAD]](s32)
100 ; MIPS32R6: $f0 = COPY [[LOAD]](s32)
117 ; MIPS32: $f0 = COPY [[LOAD]](s32)
122 ; MIPS32R6: $f0 = COPY [[LOAD]](s32)
139 ; MIPS32: $f0 = COPY [[LOAD]](s32)
161 ; MIPS32: $v0 = COPY [[LOAD]](s32)
183 ; MIPS32: $v0 = COPY [[LOAD]](s32)
205 ; MIPS32: $v0 = COPY [[LOAD]](s32)
[all …]
H A Dload_split_because_of_memsize_or_align222 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
255 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
288 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
947 ; MIPS32R6: $d0 = COPY [[LOAD]](s64)
973 ; MIPS32R6: $d0 = COPY [[LOAD]](s64)
999 ; MIPS32R6: $d0 = COPY [[LOAD]](s64)
1016 ; MIPS32: $d0 = COPY [[LOAD]](s64)
1021 ; MIPS32R6: $d0 = COPY [[LOAD]](s64)
1041 ; MIPS32: $v0 = COPY [[LOAD]](s32)
1071 ; MIPS32: $v0 = COPY [[LOAD]](s32)
[all …]
H A DtruncStore_and_aExtLoad.mir15 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
16 ; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32)
36 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
37 ; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32)
58 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s8))
60 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
84 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s8))
85 ; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store (s8))
107 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s16))
108 ; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store (s16))
[all …]
/llvm-project-15.0.7/lld/test/wasm/
H A Dload-undefined.test29 ; NO-LOAD: Name: name
30 ; NO-LOAD-NEXT: FunctionNames:
31 ; NO-LOAD-NEXT: - Index: 0
33 ; NO-LOAD-NEXT: - Index: 1
34 ; NO-LOAD-NEXT: Name: _start
35 ; NO-LOAD-NEXT: - Index: 2
36 ; NO-LOAD-NEXT: Name: ret64
37 ; NO-LOAD-NEXT: GlobalNames:
38 ; NO-LOAD-NEXT: - Index: 0
39 ; NO-LOAD-NEXT: Name: __stack_pointer
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvector-promotion.ll14 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
15 ; ASM-NEXT: vorr.i32 [[LOAD]], #0x1
16 ; ASM-NEXT: vst1.32 {[[LOAD]][1]}, [r1:32]
34 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
35 ; ASM: vmov.32 {{r[0-9]+}}, [[LOAD]]
56 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
57 ; ASM: vmov.32 {{r[0-9]+}}, [[LOAD]]
86 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
87 ; ASM-NOT: vmov.32 {{r[0-9]+}}, [[LOAD]]
111 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
[all …]
H A D2012-08-09-neon-extload.ll21 ; CHECK: vld1.16 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:16]
22 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
36 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
53 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
54 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
68 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
69 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
82 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
83 ; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]
98 ; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]
[all …]
/llvm-project-15.0.7/lld/test/MachO/
H A Dimplicit-dylibs.s68 # LOAD: cmd LC_LOAD_DYLIB
69 # LOAD-NEXT: cmdsize
70 # LOAD-NEXT: name /usr/lib/libSystem.dylib
71 # LOAD: cmd LC_LOAD_DYLIB
72 # LOAD-NEXT: cmdsize
74 # LOAD: cmd LC_LOAD_DYLIB
75 # LOAD-NEXT: cmdsize
77 # LOAD: cmd LC_LOAD_DYLIB
78 # LOAD-NEXT: cmdsize
80 # LOAD: cmd LC_LOAD_DYLIB
[all …]
H A Dtapi-link.s27 # RUN: FileCheck --check-prefixes=LOAD,LOAD-REEXPORT %s
29 # LOAD: cmd LC_LOAD_DYLIB
30 # LOAD-NEXT: cmdsize
32 # LOAD-NEXT: time stamp
33 # LOAD-NEXT: current version 1.1.1
34 # LOAD-NEXT: compatibility version
36 # LOAD-REEXPORT: cmd LC_LOAD_DYLIB
37 # LOAD-REEXPORT-NEXT: cmdsize
39 # LOAD-REEXPORT-NEXT: time stamp
40 # LOAD-REEXPORT-NEXT: current version 1.0.0
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/GVN/
H A Dequality-assume.ll6 ; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
7 ; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
19 ; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
20 ; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
33 ; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
36 ; CHECK-NEXT: ret float [[LOAD]]
47 ; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
50 ; CHECK-NEXT: ret float [[LOAD]]
77 ; CHECK-NEXT: ret float [[LOAD]]
100 ; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InferAddressSpaces/AMDGPU/
H A Dptrmask.ll11 ; CHECK-NEXT: ret i8 [[LOAD]]
24 ; CHECK-NEXT: ret i8 [[LOAD]]
37 ; CHECK-NEXT: ret i8 [[LOAD]]
49 ; CHECK-NEXT: ret i8 [[LOAD]]
61 ; CHECK-NEXT: ret i8 [[LOAD]]
74 ; CHECK-NEXT: ret i8 [[LOAD]]
87 ; CHECK-NEXT: ret i8 [[LOAD]]
100 ; CHECK-NEXT: ret i8 [[LOAD]]
115 ; CHECK-NEXT: ret i8 [[LOAD]]
126 ; CHECK-NEXT: ret i8 [[LOAD]]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dirtranslator-load-metadata.ll9 ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (invariant load (s32) from %ir.ptr)
10 ; CHECK: $w0 = COPY [[LOAD]](s32)
21 …; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (volatile invariant load (s32) from %i…
22 ; CHECK: $w0 = COPY [[LOAD]](s32)
33 …; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (dereferenceable load (s32) from %ir.p…
34 ; CHECK: $w0 = COPY [[LOAD]](s32)
45 …; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (dereferenceable invariant load (s32) …
46 ; CHECK: $w0 = COPY [[LOAD]](s32)
57 ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (non-temporal load (s32) from %ir.ptr)
58 ; CHECK: $w0 = COPY [[LOAD]](s32)
[all …]
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Darc-blocks-exceptions.m18 // CHECK-NEXT: [[LOAD:%.*]] = load i1, i1* [[CLEANUP_COND]]
19 // CHECK-NEXT: br i1 [[LOAD]], label %[[END_OF_SCOPE_LAB:.*]], label
22 // CHECK-NEXT: [[LOAD:%.*]] = load i8**, i8*** [[CLEANUP_SAVE]]
23 // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[LOAD]])
28 // CHECK: [[LOAD:%.*]] = load i1, i1* [[CLEANUP_COND]]
29 // CHECK-NEXT: br i1 [[LOAD]], label %[[EH_CLEANUP_LAB:.*]], label
32 // CHECK-NEXT: [[LOAD:%.*]] = load i8**, i8*** [[CLEANUP_SAVE]]
33 // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[LOAD]])
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dmerge-icmp.ll10 ; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
11 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 17791
26 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 17791
170 ; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
188 ; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -4096
207 ; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[LOAD]], -3841
224 ; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[LOAD]], -3841
241 ; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
258 ; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
275 ; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/
H A Dload_4_unaligned.mir38 …; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @floa…
39 ; MIPS32: $f0 = COPY [[LOAD]](s32)
43 …; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @fl…
44 ; MIPS32R6: $f0 = COPY [[LOAD]](s32)
61 …; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @floa…
62 ; MIPS32: $f0 = COPY [[LOAD]](s32)
66 …; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @fl…
67 ; MIPS32R6: $f0 = COPY [[LOAD]](s32)
84 …; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @i32_…
85 ; MIPS32: $v0 = COPY [[LOAD]](s32)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dtrunc-cmp-constant.ll7 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
8 ; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
22 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
23 ; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
48 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
60 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
84 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
96 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
119 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
135 ; XSI: buffer_load_ubyte [[LOAD:v[0-9]+]]
[all …]

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