Home
last modified time | relevance | path

Searched refs:LLC (Results 1 – 25 of 36) sorted by relevance

12

/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-bitfield-extract.ll11 ; LLC-LABEL: foo:
12 ; LLC: // %bb.0:
16 ; LLC-NEXT: ret
37 ; LLC-LABEL: baz:
40 ; LLC-NEXT: ret
53 ; LLC-LABEL: bar:
56 ; LLC-NEXT: ret
69 ; LLC-LABEL: fct1:
74 ; LLC-NEXT: ret
93 ; LLC-LABEL: fct2:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dpropagate-attributes-single-set.ll17 ; LLC: foo3:
18 ; LLC: sample asm
19 ; LLC: foo2:
20 ; LLC: sample asm
21 ; LLC: foo1:
22 ; LLC: foo4@gotpcrel32@lo+4
24 ; LLC: foo3@gotpcrel32@lo+4
26 ; LLC: foo2@gotpcrel32@lo+4
28 ; LLC: foo1@gotpcrel32@lo+4
30 ; LLC: kernel1:
[all …]
H A Dpropagate-attributes-clone.ll67 ; LLC: foo3:
68 ; LLC: sample asm
69 ; LLC: foo2:
70 ; LLC: sample asm
71 ; LLC: foo1:
72 ; LLC: foo4@gotpcrel32@lo+4
74 ; LLC: foo3@gotpcrel32@lo+4
76 ; LLC: foo2@gotpcrel32@lo+4
82 ; LLC: kernel1:
85 ; LLC: kernel2:
[all …]
H A Dcodegen-prepare-addrmode-sext.ll2 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI-LLC %s
8 ; SI-LLC-LABEL: {{^}}test:
9 ; SI-LLC: s_mul_i32
10 ; SI-LLC-NOT: mul
/llvm-project-15.0.7/llvm/test/Feature/
H A Doptnone-llc.ll38 ; LLC-O0-NOT: Skipping pass
42 ; LLC-Ox-DAG: Skipping pass 'CodeGen Prepare'
43 ; LLC-Ox-DAG: Skipping pass 'Control Flow Optimizer'
44 ; LLC-Ox-DAG: Skipping pass 'Machine code sinking'
46 ; LLC-Ox-DAG: Skipping pass 'Shrink Wrapping analysis'
47 ; LLC-Ox-DAG: Skipping pass 'Machine Copy Propagation Pass'
48 ; LLC-Ox-DAG: Skipping pass 'Machine Instruction Scheduler'
50 ; LLC-Ox-DAG: Skipping pass 'Optimize machine instruction PHIs'
51 ; LLC-Ox-DAG: Skipping pass 'Peephole Optimizations'
53 ; LLC-Ox-DAG: Skipping pass 'Remove dead machine instructions'
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/HardwareLoops/ARM/
H A Dsimple-do.ll19 ; CHECK-LLC-LABEL:do_copy:
20 ; CHECK-LLC-NOT: mov lr, r0
21 ; CHECK-LLC: dls lr, r0
22 ; CHECK-LLC-NOT: mov lr, r0
62 ; CHECK-LLC-LABEL:do_inc1:
64 ; CHECK-LLC-NOT: mov lr,
112 ; CHECK-LLC: do_inc2:
113 ; CHECK-LLC-NOT: mov lr,
115 ; CHECK-LLC-NOT: dls lr,
165 ; CHECK-LLC: do_dec2
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ParallelDSP/
H A Dcomplex_dot_prod.ll7 ; CHECK-LLC-LABEL: complex_dot_prod:
8 ; CHECK-LLC: @ %bb.0: @ %entry
10 ; CHECK-LLC-NEXT: ldr r5, [r0]
11 ; CHECK-LLC-NEXT: ldr r7, [r1]
15 ; CHECK-LLC-NEXT: ldr r4, [r1, #4]
18 ; CHECK-LLC-NEXT: movs r0, #0
19 ; CHECK-LLC-NEXT: movs r1, #0
24 ; CHECK-LLC-NEXT: subs r6, r6, r5
29 ; CHECK-LLC-NEXT: subs r6, r6, r4
45 ; CHECK-LLC-NEXT: str r7, [r2]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb/
H A Dconsthoist-few-dependents.ll24 ; LLC-LABEL: avalon
25 ; LLC-DAG: movs r{{[0-9]+}}, #0
26 ; LLC-DAG: movs r{{[0-9]+}}, #1
27 ; LLC-NOT: add
72 ; LLC-LABEL: barney
73 ; LLC-DAG: movs r{{[0-9]+}}, #254
75 ; LLC-NOT: mvn
76 ; LLC-NOT: add
158 ; LLC-LABEL: carla
161 ; LLC-NOT: mvn
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dstatepoint-forward.ll2 ; RUN: llc -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-LLC %s
36 ; CHECK-LLC-LABEL: test_load_forward
37 ; CHECK-LLC: callq f
55 ; CHECK-LLC-LABEL: test_store_forward
56 ; CHECK-LLC: callq f
82 ; CHECK-LLC-LABEL: test_load_forward_nongc_heap
83 ; CHECK-LLC: callq f
100 ; CHECK-LLC-LABEL: test_store_forward_nongc_heap
101 ; CHECK-LLC: callq f
H A D2005-05-08-FPStackifierPHI.ll2 ; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
/llvm-project-15.0.7/llvm/tools/bugpoint/
H A DToolRunner.h32 class LLC; variable
86 static LLC *createLLC(const char *Argv0, std::string &Message,
146 class LLC : public AbstractInterpreter {
153 LLC(const std::string &llcPath, CC *cc, const std::vector<std::string> *Args, in LLC() function
161 ~LLC() override { delete cc; } in ~LLC()
H A DToolRunner.cpp433 Expected<CC::FileType> LLC::OutputCode(const std::string &Bitcode, in OutputCode()
471 Error LLC::compileProgram(const std::string &Bitcode, unsigned Timeout, in compileProgram()
482 Expected<int> LLC::ExecuteProgram(const std::string &Bitcode, in ExecuteProgram()
507 LLC *AbstractInterpreter::createLLC(const char *Argv0, std::string &Message, in createLLC()
525 return new LLC(*LLCPath, cc, Args, UseIntegratedAssembler); in createLLC()
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-conv-02.ll35 ; Check LLC with no displacement.
45 ; Check the high end of the LLC range.
69 ; Check the high end of the negative LLC range.
80 ; Check the low end of the LLC range.
104 ; Check that LLC allows an index
118 ; to use LLC if possible.
H A Dmultiselect-02.mir20 %0:gr32bit = LLC %1, 0, $noreg :: (load (s8) from `i8* undef`)
H A Dint-conv-11.ll6 ; to use LLC(H) if possible.
/llvm-project-15.0.7/llvm/docs/
H A DHowToSubmitABug.rst172 which code generator you wish to compile the program with (e.g. LLC or the JIT)
191 can debug incorrect code generation by either LLC or the JIT, using
206 Similarly, to debug the LLC, one would run:
216 debug the JIT, LLC, and CBE, using the pre-written Makefile targets, which
226 backend and the *test* file which either LLC or the JIT
239 #. If debugging LLC, compile test bitcode native and link with the shared
H A DBugpoint.rst90 the JIT or the static LLC compiler. It uses several techniques to reduce the
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A D2003-07-29-BadConstSbyte.ll14 ;; Incorrect LLC Output for the array yy_ec was:
/llvm-project-15.0.7/llvm/tools/llvm-readobj/
H A DMachODumper.cpp816 MachO::linkedit_data_command LLC = Obj->getLinkeditDataLoadCommand(Load); in printMachODataInCode() local
818 W.printNumber("Data offset", LLC.dataoff); in printMachODataInCode()
819 W.printNumber("Data size", LLC.datasize); in printMachODataInCode()
821 unsigned NumRegions = LLC.datasize / sizeof(MachO::data_in_code_entry); in printMachODataInCode()
824 LLC.dataoff, i); in printMachODataInCode()
/llvm-project-15.0.7/llvm/utils/
H A Dupdate_mir_test_checks.py59 class LLC: class
426 parser.add_argument('--llc-binary', dest='llc', default='llc', type=LLC,
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/X86/
H A Dlsr-insns-2.ll20 ; LLC checks that LSR prefers less instructions to less registers.
H A Dlsr-insns-1.ll8 ; LLC test checks that LSR optimize compare for static counter.
/llvm-project-15.0.7/llvm/docs/HistoricalNotes/
H A D2003-06-25-Reoptimizer1.txt44 Assume that there is 1 free register. On SPARC we use %g1, which LLC
63 LLC has been taught to recognize llvm_first_trigger() calls and NOT
H A D2003-06-26-Reoptimizer2.txt31 code. The mapping info inserted by LLC is not sufficient to determine
/llvm-project-15.0.7/llvm/tools/llvm-nm/
H A Dllvm-nm.cpp1577 MachO::linkedit_data_command LLC = in dumpSymbolsFromDLInfoMachO() local
1580 MachO.ReadULEB128s(LLC.dataoff, FoundFns); in dumpSymbolsFromDLInfoMachO()

12