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Searched refs:LDM (Results 1 – 25 of 25) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DAddDiscriminators.cpp190 LocationDiscriminatorMap LDM; in addDiscriminators() local
217 unsigned Discriminator = R.second ? ++LDM[L] : LDM[L]; in addDiscriminators()
254 unsigned Discriminator = ++LDM[L]; in addDiscriminators()
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dt2-shrink-ldrpost.ll7 ; NOTE: When optimising for minimum size, an LDM is expected to be generated
42 ; NOTE: When not optimising for minimum size, an LDM is expected not to be generated
H A D2010-10-25-ifcvt-ldm.ll3 ; LDM instruction, was causing an assertion failure because the microop count
H A Dcortex-a57-misched-ldm.ll5 ; We need second, post-ra scheduling to have LDM instruction combined from single-loads
H A Dcortex-a57-misched-ldm-wrback.ll10 ; We need second, post-ra scheduling to have LDM instruction combined from single-loads
H A D2013-04-16-AAPCS-C4-vs-VFP.ll24 ;registers from memory using an LDM instruction. The argument has now been
/llvm-project-15.0.7/mlir/test/Conversion/GPUToNVVM/
H A Dwmma-ops-to-nvvm.mlir17 // CHECK: %[[LDM:.*]] = llvm.mlir.constant(32 : index) : i64
18 // CHECK: %[[LI:.*]] = llvm.mul %[[INX]], %[[LDM]] : i64
29 // CHECK32: %[[LDM:.*]] = llvm.mlir.constant(32 : index) : i32
30 // CHECK32: %[[LI:.*]] = llvm.mul %[[INX]], %[[LDM]] : i32
61 // CHECK: %[[LDM:.*]] = llvm.mlir.constant(32 : index) : i64
62 // CHECK: %[[LI:.*]] = llvm.mul %[[INX]], %[[LDM]] : i64
77 // CHECK32: %[[LDM:.*]] = llvm.mlir.constant(32 : index) : i32
78 // CHECK32: %[[LI:.*]] = llvm.mul %[[INX]], %[[LDM]] : i32
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleM4.td55 def : M4UnitL2I<(instregex "(t|t2)LDM")>;
H A DARMScheduleR52.td480 (instregex "LDM(IA|DA|DB|IB)$", "t2LDM(IA|DA|DB|IB)$",
481 "(t|sys)LDM(IA|DA|DB|IB)$")>;
483 (instregex "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
H A DARMScheduleSwift.td482 (instregex "LDM(IA|DA|DB|IB)$", "t2LDM(IA|DA|DB|IB)$",
483 "(t|sys)LDM(IA|DA|DB|IB)$")>;
486 "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
H A DARMScheduleM7.td243 (instregex "(t|t2)LDM(DB|IA)$")>;
247 (instregex "(t|t2)LDM(DB|IA)_UPD$", "tPOP")>;
H A DARMScheduleA9.td2049 // Define a predicate to select the LDM based on number of memory addresses.
2058 // LDM/VLDM/VLDn address generation latency & resources.
2069 // For unknown LDM/VLDM/VSTM, assume 2 32-bit registers.
2072 // Define LDM Resources.
2092 // LDM: Load multiple into 32-bit integer registers.
2247 // tuple, unlike LDM. So the number of write operands is not variadic.
2253 // Resources for other (non-LDM/VLDM) Variants.
H A DARMSchedule.td189 // LDM, base reg in list
H A DARMBaseInstrInfo.cpp1634 MachineInstrBuilder LDM, STM; in expandMEMCPY() local
1637 LDM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2LDMIA_UPD in expandMEMCPY()
1642 LDM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2LDMIA : ARM::LDMIA)); in expandMEMCPY()
1656 LDM.add(LDBase).add(predOps(ARMCC::AL)); in expandMEMCPY()
1673 LDM.addReg(Reg, RegState::Define); in expandMEMCPY()
H A DARMScheduleA57.td590 def : InstRW<[A57WriteLDM], (instregex "(t|t2|sys)?LDM(IA|DA|DB|IB)$")>;
594 (instregex "(t|t2|sys)?LDM(IA_UPD|DA_UPD|DB_UPD|IB_UPD|IA_RET)", "tPOP")>;
H A DARMInstrThumb.td1651 // post-inc LDR -> LDM r0!, {r1}. The way operands are layed out in LDMs is
H A DARMInstrInfo.td3537 defm LDM : arm_ldst_mult<"ldm", "", 1, 0, LdStMulFrm, IIC_iLoad_m,
6227 // PUSH/POP aliases for STM/LDM
H A DARMInstrThumb2.td5078 // PUSH/POP aliases for STM/LDM
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dthumb1.txt147 # LDM
H A Dinvalid-armv7.txt105 # A8.6.53 LDM/LDMIA/LDMFD is predicated with Inst{31-28} as cond ==> Not an LDMIA instruction
H A Dbasic-arm-instructions.txt663 # LDM*
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s248 @ LDM
H A Dthumb-diagnostics.s87 @ Invalid writeback and register lists for LDM
H A Ddiagnostics.s567 @ CHECK-ERRORS: error: writeback register only allowed on system LDM if PC in register-list
H A Dbasic-arm-instructions.s1158 @ LDM*