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Searched refs:LC1 (Results 1 – 25 of 42) sorted by relevance

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/llvm-project-15.0.7/lld/test/ELF/
H A Dmips-got16.s59 lw $t0,%got($LC1)($gp)
60 addi $t0,$t0,%lo($LC1)
61 lw $t0,%got($LC1+0x10004)($gp)
62 addi $t0,$t0,%lo($LC1+0x10004)
63 lw $t0,%got($LC1+0x18004)($gp)
64 addi $t0,$t0,%lo($LC1+0x18004)
73 $LC1:
H A Dppc64-toc-relax2.s17 addis 3, 2, .LC1@toc@ha # R_PPC64_TOC16_HA
19 ld 3, .LC1@toc@l(3) # R_PPC64_TOC16_LO_DS
27 addis 3, 2, .LC1@toc@ha
29 ld 3, .LC1@toc@l(3)
63 .LC1: label
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dswaps-le-6.ll27 ; CHECK-NEXT: addis r4, r2, .LC1@toc@ha
30 ; CHECK-NEXT: ld r3, .LC1@toc@l(r4)
45 ; CHECK-P9-NEXT: addis r3, r2, .LC1@toc@ha
46 ; CHECK-P9-NEXT: ld r3, .LC1@toc@l(r3)
59 ; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC1@toc@ha
60 ; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC1@toc@l(r3)
81 ; CHECK-NEXT: addis r4, r2, .LC1@toc@ha
84 ; CHECK-NEXT: ld r3, .LC1@toc@l(r4)
99 ; CHECK-P9-NEXT: addis r3, r2, .LC1@toc@ha
100 ; CHECK-P9-NEXT: ld r3, .LC1@toc@l(r3)
[all …]
H A Dstore-constant.ll63 ; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
68 ; CHECK-NEXT: ld 4, .LC1@toc@l(4)
89 ; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
94 ; CHECK-NEXT: ld 4, .LC1@toc@l(4)
114 ; CHECK-NEXT: addis 3, 2, .LC1@toc@ha
118 ; CHECK-NEXT: ld 3, .LC1@toc@l(3)
136 ; CHECK-NEXT: addis 3, 2, .LC1@toc@ha
140 ; CHECK-NEXT: ld 3, .LC1@toc@l(3)
266 ; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
269 ; CHECK-NEXT: ld 4, .LC1@toc@l(4)
H A DVSX-XForm-Scalars.ll21 ; CHECK-P8: addis r3, r2, .LC1@toc@ha
22 ; CHECK-P8: ld r3, .LC1@toc@l(r3)
36 ; CHECK-P9: addis r3, r2, .LC1@toc@ha
37 ; CHECK-P9: ld r3, .LC1@toc@l(r3)
H A Dp9-vbpermd.ll17 ; CHECK-NEXT: addis 3, 2, .LC1@toc@ha
18 ; CHECK-NEXT: ld 3, .LC1@toc@l(3)
H A D2006-07-07-ComputeMaskedBits.ll12 ; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
16 ; CHECK-NEXT: ld 4, .LC1@toc@l(5)
H A Dlicm-tocReg.ll71 ; CHECKLX-NEXT: addis 5, 2, .LC1@toc@ha
74 ; CHECKLX-NEXT: ld 5, .LC1@toc@l(5)
81 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC1@toc@ha
85 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC1@toc@ha
H A Dcxx_tlscc64.ll34 ; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
36 ; CHECK-NEXT: ld 5, .LC1@toc@l(4)
H A Dpower9-moves-and-splats.ll122 ; CHECK-NEXT: addis r3, r2, .LC1@toc@ha
123 ; CHECK-NEXT: ld r3, .LC1@toc@l(r3)
129 ; CHECK-BE-NEXT: addis r3, r2, .LC1@toc@ha
130 ; CHECK-BE-NEXT: ld r3, .LC1@toc@l(r3)
H A Dpr33547.ll19 ; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
21 ; CHECK-NEXT: ld 4, .LC1@toc@l(4)
H A Dmcm-1.ll44 ; CHECK-NEXT: .LC1:
/llvm-project-15.0.7/lld/test/ELF/Inputs/
H A Dppc64-sort-small-cm-relocs-input2.s12 addis 6, 2, .LC1@toc@ha
14 ld 6, .LC1@toc@l(6)
22 .LC1: label
H A Dppc64-sort-small-cm-relocs-input3.s22 ld 3, .LC1@toc(2)
31 .LC1: label
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dstm.ll4 @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstrin…
13 …%0 = tail call i32 (i8*, ...) @printf(i8* getelementptr ([26 x i8], [26 x i8]* @"\01LC1", i32 0, i…
/llvm-project-15.0.7/llvm/test/MC/PowerPC/
H A Dppc64-relocs-01.s11 ld 4, .LC1@toc(2)
15 .LC1: label
H A Dppc-reloc.s11 .LC1: label
/llvm-project-15.0.7/bolt/test/X86/
H A Dfalse-jump-table.s17 .LC1: label
73 leaq .LC1(%rip), %rdi
H A Dzero-sized-object.s17 .LC1: label
69 movl $.LC1, %edi
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A D2008-09-29-ReMatBug.ll11 @"\01LC1" = internal constant [1 x i8] zeroinitializer ; <ptr> [#uses=1]
37 call void @foo(ptr @"\01LC1") nounwind nounwind
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dclass.cpp93 class LC1 { in f() class
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.h113 Hexagon::LC1 == R); in isLoopRegister()
/llvm-project-15.0.7/lldb/test/Shell/SymbolFile/DWARF/x86/
H A DDW_AT_declaration-with-children.s283 .LC1: label
291 .long .LC1-.Lcu_begin0 # DW_AT_type
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td98 Defs = [PC, LC1], Uses = [SA1, LC1] in {
105 Defs = [PC, LC0, LC1], Uses = [SA0, SA1, LC0, LC1] in {
156 let Defs = [SA1, LC1], isCodeGenOnly = 1, isExtended = 1, opExtendable = 0 in {
/llvm-project-15.0.7/bolt/test/X86/Inputs/
H A Dexc_args.s187 .LC1: label
250 movl $.LC1, %edi

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