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Searched refs:JumpInst (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCompound.cpp356 MCInst const *JumpInst = J->getInst(); in lookForCompound() local
357 if (HexagonMCInstrInfo::isImmext(*JumpInst)) { in lookForCompound()
361 if (HexagonMCInstrInfo::getType(MCII, *JumpInst) == HexagonII::TypeJ) { in lookForCompound()
368 if (JumpInst == Inst) { in lookForCompound()
376 LLVM_DEBUG(dbgs() << "J,B: " << JumpInst->getOpcode() << "," in lookForCompound()
378 if (isOrderedCompoundPair(*Inst, BExtended, *JumpInst, JExtended)) { in lookForCompound()
379 MCInst *CompoundInsn = getCompoundInsn(Context, *Inst, *JumpInst); in lookForCompound()
382 << JumpInst->getOpcode() << " Compounds to " in lookForCompound()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600ControlFlowFinalizer.cpp575 MachineInstr * JumpInst = IfThenElseStack.back(); in runOnMachineFunction() local
577 CounterPropagateAddr(*JumpInst, CfCount); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips32r6InstrInfo.td1108 class TailCallRegR6<Instruction JumpInst, Register RT, RegisterOperand RO> :
1110 PseudoInstExpansion<(JumpInst RT:$rt, RO:$rs)>;
1113 class PseudoIndirectBranchBaseR6<Instruction JumpInst, Register RT,
1117 PseudoInstExpansion<(JumpInst RT:$rt, RO:$rs)> {
H A DMipsInstrInfo.td1604 class TailCall<Instruction JumpInst, DAGOperand Opnd> :
1606 PseudoInstExpansion<(JumpInst Opnd:$target)>;
1608 class TailCallReg<Instruction JumpInst, RegisterOperand RO> :
1610 PseudoInstExpansion<(JumpInst RO:$rs)> {
2281 class PseudoIndirectBranchBase<Instruction JumpInst, RegisterOperand RO> :
2284 PseudoInstExpansion<(JumpInst RO:$rs)> {
H A DMicroMips32r6InstrInfo.td1786 class JumpLinkMMR6<Instruction JumpInst, DAGOperand Opnd> :
1788 PseudoInstExpansion<(JumpInst Opnd:$target)>;