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Searched refs:IsTop (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DVLIWMachineScheduler.h57 virtual bool isResourceAvailable(SUnit *SU, bool IsTop);
58 virtual bool reserveResources(SUnit *SU, bool IsTop);
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DVLIWMachineScheduler.cpp108 bool VLIWResourceModel::isResourceAvailable(SUnit *SU, bool IsTop) { in isResourceAvailable() argument
132 if (IsTop) { in isResourceAvailable()
145 bool VLIWResourceModel::reserveResources(SUnit *SU, bool IsTop) { in reserveResources() argument
155 if (!isResourceAvailable(SU, IsTop) || in reserveResources()
H A DMachineScheduler.cpp2888 static void tracePick(GenericSchedulerBase::CandReason Reason, bool IsTop) { in tracePick() argument
2889 LLVM_DEBUG(dbgs() << "Pick " << (IsTop ? "Top " : "Bot ") in tracePick()
/llvm-project-15.0.7/lldb/include/lldb/Core/
H A DIOHandler.h518 bool IsTop(const lldb::IOHandlerSP &io_handler_sp) const { in IsTop() function
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp263 unsigned IsTop = cast<ConstantInt>(II.getOperand(TopOpc))->getZExtValue(); in simplifyDemandedVectorEltsIntrinsic() local
268 APInt::getSplat(NumElts, IsTop ? APInt::getLowBitsSet(2, 1) in simplifyDemandedVectorEltsIntrinsic()
272 UndefElts &= APInt::getSplat(NumElts, !IsTop ? APInt::getLowBitsSet(2, 1) in simplifyDemandedVectorEltsIntrinsic()
H A DARMISelLowering.cpp17101 unsigned IsTop = N->getConstantOperandVal(2); in PerformVMOVNCombine() local
17108 if (Op0->isUndef() && !IsTop) in PerformVMOVNCombine()
17125 IsTop ? Op1DemandedElts in PerformVMOVNCombine()
17140 unsigned IsTop = N->getConstantOperandVal(2); in PerformVQMOVNCombine() local
17144 APInt::getSplat(NumElts, IsTop ? APInt::getLowBitsSet(2, 1) in PerformVQMOVNCombine()
/llvm-project-15.0.7/lldb/source/Core/
H A DDebugger.cpp1070 return m_io_handler_stack.IsTop(reader_sp); in IsTopIOHandler()