Searched refs:IsInc (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 204 bool IsInc) const;
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| H A D | AMDGPULegalizerInfo.cpp | 4612 bool IsInc) const { in legalizeAtomicIncDec()
4613 unsigned Opc = IsInc ? AMDGPU::G_AMDGPU_ATOMIC_INC : in legalizeAtomicIncDec()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 606 bool IsInc);
2459 llvm::Value *InVal, bool IsInc, in createBinOpInfoFromIncDec() argument
2465 BinOp.Opcode = IsInc ? BO_Add : BO_Sub; in createBinOpInfoFromIncDec()
2472 const UnaryOperator *E, llvm::Value *InVal, bool IsInc) { in EmitIncDecConsiderOverflowBehavior() argument
2474 llvm::ConstantInt::get(InVal->getType(), IsInc ? 1 : -1, true); in EmitIncDecConsiderOverflowBehavior()
2475 StringRef Name = IsInc ? "inc" : "dec"; in EmitIncDecConsiderOverflowBehavior()
2487 E, InVal, IsInc, E->getFPFeaturesInEffect(CGF.getLangOpts()))); in EmitIncDecConsiderOverflowBehavior()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 2176 bool IsInc = I == E-1 || SwapElems[I] < SwapElems[I+1]; in perfect() local
2179 while (++I < E-1 && IsInc == (SwapElems[I] < SwapElems[I+1])) in perfect()
2189 Res.Opc = IsInc ? Hexagon::V6_vshuffvdd : Hexagon::V6_vdealvdd; in perfect()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 1114 ISD::MemIndexedMode &AM, bool &IsInc,
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| H A D | AArch64ISelLowering.cpp | 19924 bool &IsInc, in getIndexedAddressParts() argument
19938 IsInc = (Op->getOpcode() == ISD::ADD); in getIndexedAddressParts()
19960 bool IsInc; in getPreIndexedAddressParts() local
19961 if (!getIndexedAddressParts(Ptr.getNode(), Base, Offset, AM, IsInc, DAG)) in getPreIndexedAddressParts()
19963 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
19981 bool IsInc; in getPostIndexedAddressParts() local
19982 if (!getIndexedAddressParts(Op, Base, Offset, AM, IsInc, DAG)) in getPostIndexedAddressParts()
19988 AM = IsInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 14078 bool IsInc, bool IsPrefix) { in CheckIncrementDecrementOperand() argument
14093 if (!IsInc) { in CheckIncrementDecrementOperand()
14103 S.Diag(OpLoc, diag::err_increment_decrement_enum) << IsInc << ResType; in CheckIncrementDecrementOperand()
14125 IsInc, IsPrefix); in CheckIncrementDecrementOperand()
14137 << ResType << int(IsInc) << Op->getSourceRange(); in CheckIncrementDecrementOperand()
14148 << IsInc << ResType; in CheckIncrementDecrementOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24188 static SDValue incDecVectorConstant(SDValue V, SelectionDAG &DAG, bool IsInc) { in incDecVectorConstant() argument
24205 if ((IsInc && EltC.isMaxValue()) || (!IsInc && EltC.isZero())) in incDecVectorConstant()
24208 NewVecC.push_back(DAG.getConstant(EltC + (IsInc ? 1 : -1), DL, EltVT)); in incDecVectorConstant()
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