| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1088 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, in getVectorTypeBreakdownMVT() argument
1126 IntermediateVT = NewVT; in getVectorTypeBreakdownMVT()
1465 MVT IntermediateVT; in computeRegisterProperties() local
1468 unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT, in computeRegisterProperties()
1533 EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdown() argument
1548 IntermediateVT = RegisterEVT; in getVectorTypeBreakdown()
1579 IntermediateVT = PartVT; in getVectorTypeBreakdown()
1580 RegisterVT = getRegisterType(Context, IntermediateVT); in getVectorTypeBreakdown()
1604 IntermediateVT = NewVT; in getVectorTypeBreakdown()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 333 EVT IntermediateVT; in getCopyFromPartsVector() local
340 *DAG.getContext(), *CallConv, ValueVT, IntermediateVT, in getCopyFromPartsVector()
377 IntermediateVT.isVector() in getCopyFromPartsVector()
379 *DAG.getContext(), IntermediateVT.getScalarType(), in getCopyFromPartsVector()
380 IntermediateVT.getVectorElementCount() * NumParts) in getCopyFromPartsVector()
382 IntermediateVT.getScalarType(), in getCopyFromPartsVector()
384 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS in getCopyFromPartsVector()
700 EVT IntermediateVT; in getCopyToPartsVector() local
706 *DAG.getContext(), CallConv.value(), ValueVT, IntermediateVT, in getCopyToPartsVector()
723 if (IntermediateVT.isVector()) in getCopyToPartsVector()
[all …]
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| H A D | SelectionDAG.cpp | 2268 EVT IntermediateVT; in getReducedAlign() local
2271 TLI->getVectorTypeBreakdown(*getContext(), VT, IntermediateVT, in getReducedAlign()
2273 Ty = IntermediateVT.getTypeForEVT(*getContext()); in getReducedAlign()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 305 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
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| H A D | MipsISelLowering.cpp | 118 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdownForCallingConv() argument
122 IntermediateVT = RegisterVT; in getVectorTypeBreakdownForCallingConv()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 44 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
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| H A D | SIISelLowering.cpp | 869 EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdownForCallingConv() argument
880 IntermediateVT = RegisterVT; in getVectorTypeBreakdownForCallingConv()
887 IntermediateVT = RegisterVT; in getVectorTypeBreakdownForCallingConv()
895 IntermediateVT = ScalarVT; in getVectorTypeBreakdownForCallingConv()
903 IntermediateVT = ScalarVT; in getVectorTypeBreakdownForCallingConv()
910 IntermediateVT = RegisterVT; in getVectorTypeBreakdownForCallingConv()
917 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1016 EVT &IntermediateVT,
1024 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdownForCallingConv() argument
1026 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1456 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
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| H A D | X86ISelLowering.cpp | 2542 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdownForCallingConv() argument
2551 IntermediateVT = MVT::i1; in getVectorTypeBreakdownForCallingConv()
2560 IntermediateVT = MVT::v32i1; in getVectorTypeBreakdownForCallingConv()
2565 return TargetLowering::getVectorTypeBreakdownForCallingConv(Context, CC, VT, IntermediateVT, in getVectorTypeBreakdownForCallingConv()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8453 MVT IntermediateVT = FourEltRes ? MVT::v4i32 : MVT::v2i64; in LowerINT_TO_FPVector() local
8474 Arrange = DAG.getBitcast(IntermediateVT, Arrange); in LowerINT_TO_FPVector()
8478 IntermediateVT.getVectorNumElements()); in LowerINT_TO_FPVector()
8480 Extend = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, IntermediateVT, Arrange, in LowerINT_TO_FPVector()
8483 Extend = DAG.getNode(ISD::BITCAST, dl, IntermediateVT, Arrange); in LowerINT_TO_FPVector()
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