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/llvm-project-15.0.7/openmp/runtime/
H A DREADME.txt49 * Intel(R) 64 architecture
50 * Intel(R) Many Integrated Core Architecture
61 Supported Architectures: IA-32 architecture, Intel(R) 64, and
62 Intel(R) Many Integrated Core Architecture
73 (1) On IA-32 architecture and Intel(R) 64, icc/icl versions 12.x are
77 (4) Intel(R) Many Integrated Core Architecture not supported.
78 (5) On Intel(R) Many Integrated Core Architecture, icc/icl versions 13.0
88 (8) Community contribution provided AS IS, not tested by Intel.
109 http://clang-omp.github.io/ ), Intel compilers, GCC. See the documentation
H A DCMakeLists.txt92 …"Intel(R) Many Integrated Core Architecture (Intel(R) MIC Architecture) (knf/knc). Ignored if not…
164 elseif("${LIBOMP_ARCH}" STREQUAL "x86_64" OR "${LIBOMP_ARCH}" STREQUAL "32e") # Intel(R) 64 archite…
178 elseif("${LIBOMP_ARCH}" STREQUAL "mic") # Intel(R) Many Integrated Core Architecture
269 # Intel(R) Transactional Synchronization Extensions (Intel(R) TSX) based locks have
273 "Should Intel(R) TSX lock be compiled (adaptive lock in kmp_lock.cpp). These are x86 specific.")
275 …libomp_error_say("Adaptive locks (Intel(R) TSX) functionality is only supported on x86 Architectur…
385 libomp_say("Intel(R) MIC Architecture -- ${LIBOMP_MIC_ARCH}")
/llvm-project-15.0.7/lldb/tools/intel-features/
H A DREADME.txt5 * enable using various hardware features of Intel(R) architecture based *
14 Intel(R) architecture based processors through LLDB's command line. The library
15 currently comprises of hardware features namely Intel(R) Processor Trace and
16 Intel(R) Memory Protection Extensions.
47 - LLDB_BUILD_INTEL_MPX - Enables building Intel(R) Memory Protection Extensions
H A DCMakeLists.txt2 option(LLDB_BUILD_INTEL_MPX "Enable Building of Intel(R) Memory Protection Extensions" ON)
/llvm-project-15.0.7/lldb/docs/use/
H A Dintel_pt.rst1 Tracing with Intel Processor Trace
7 Intel PT is a technology available in modern Intel CPUs that allows efficient
11 https://easyperf.net/blog/2019/08/23/Intel-Processor-Trace.
16 Confirm that your CPU supports Intel PT
32 Clone and build the low level Intel PT
45 Configure and build LLDB with Intel PT support
175 It's also possible to record a trace using a custom Intel PT collector
249 - Some details about how Meta is using Intel Processor Trace can be found in this blog_ post.
/llvm-project-15.0.7/lld/cmake/modules/
H A DFindVTune.cmake9 "C:/Program Files (x86)/Intel/VTune Amplifier XE 2013/"
11 "C:/Program Files (x86)/Intel/VTune Amplifier XE 2011/"
/llvm-project-15.0.7/openmp/runtime/cmake/
H A DLibompMicroTests.cmake17 # - Available for all Unix,Mac,Windows builds. Not available on Intel(R) MIC Architecture builds.
22 # - Available for Unix, Intel(R) MIC Architecture dynamic library builds. Not available otherwise.
28 # (4) test-instr (Intel(R) MIC Architecture only)
29 # - Tests Intel(R) MIC Architecture libraries for valid instruction set
30 # - Fails if finds invalid instruction for Intel(R) MIC Architecture (wasn't compiled with correct…
32 # - Available for Intel(R) MIC Architecture and i386 builds. Not available otherwise.
37 # - Available for Unix,Mac,Windows, Intel(R) MIC Architecture dynamic builds and Windows
68 else() # (Unix based systems, Intel(R) MIC Architecture, and Mac)
/llvm-project-15.0.7/openmp/runtime/doc/doxygen/
H A Dheader.tex65 Intel, Xeon, and Intel Xeon Phi are trademarks of Intel Corporation in the U.S. and/or other countr…
/llvm-project-15.0.7/third-party/benchmark/docs/
H A Dplatform_specific_build_instructions.md41 ## Building with Intel 2015 Update 1 or Intel System Studio Update 4
43 …building with Visual Studio. Once built, right click on the solution and change the build to Intel.
/llvm-project-15.0.7/openmp/libomptarget/
H A DREADME.txt31 * Intel(R) 64 architecture
37 * Intel(R) 64 architecture (generic 64-bit plugin - mostly for testing purposes)
45 Supported Architectures: Intel(R) 64, IBM(R) Power 7 and Power 8
/llvm-project-15.0.7/openmp/
H A DLICENSE.TXT254 Copyright (c) 1997-2019 Intel Corporation
260 Intel Corporation
277 * Neither the names of Intel Corporation OpenMP Runtime Team nor the
291 Copyright (c) 1997-2019 Intel Corporation
313 Intel Corporation
317 Except for the license granted herein to you, Intel Corporation ("Intel") reserves
334 Agreement, Intel hereby grants to you and to recipients of the Software
341 Agreement, Intel hereby grants you and to recipients of the Software
346 by Intel that are necessarily infringed by Intel's Software alone or by
348 submitted. If any entity institutes patent litigation against Intel or any
[all …]
H A DREADME.rst145 Intel(R) Many Integrated Core Architecture (Intel(R) MIC Architecture) to
186 Include adaptive locks, based on Intel(R) Transactional Synchronization
187 Extensions (Intel(R) TSX). This feature is x86 specific and turned ``ON``
188 by default for IA-32 architecture and Intel(R) 64 architecture.
337 Intel(R) C Compiler and the Intel(R) C++ Compiler. Also, create Fortran
338 modules with the Intel(R) Fortran Compiler.
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCAsmInfo.cpp23 ATT = 0, Intel = 1 enumerator
30 clEnumValN(Intel, "intel", "Emit Intel-style assembly")));
/llvm-project-15.0.7/openmp/runtime/src/
H A Dexports_so.txt31 kmp_*; # Intel extensions.
32 kmpc_*; # Intel extensions.
/llvm-project-15.0.7/lldb/source/Plugins/Trace/
H A DCMakeLists.txt1 option(LLDB_BUILD_INTEL_PT "Enable Building of Intel(R) Processor Trace Tool" OFF)
/llvm-project-15.0.7/llvm/cmake/modules/
H A DDetermineGCCCompatible.cmake10 elseif( "${CMAKE_CXX_COMPILER_ID}" MATCHES "Intel" )
/llvm-project-15.0.7/llvm/tools/llvm-jitlistener/
H A DCMakeLists.txt1 # This tool is excluded from the CMake build if Intel JIT events are disabled.
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/
H A Dlit.local.cfg12 # Run test in emulator (Intel SDE).
H A Dtest-rsqrt.mlir11 …// `rsqrt` may produce slightly different results on Intel and AMD machines: accept both results h…
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/AMX/
H A Dlit.local.cfg12 # Run test in emulator (Intel SDE): AMX needs Sapphire Rapids CPU.
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SchedPredicates.td65 // on recent Intel CPUs.
77 // on recent Intel CPUs.
H A DX86InstrSGX.td9 // This file describes the instructions that make up the Intel SGX instruction
/llvm-project-15.0.7/mlir/include/mlir/Dialect/AMX/
H A DAMX.td11 // The Intel Advanced Matrix Extensions (AMX) provide a tile matrix
17 // of Intel AMX, such as configuration setup, tile sizes, instructions,
42 The Intel Advanced Matrix Extensions (AMX) provide a tile matrix
55 For details, see the Intel documentation:
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/altera/
H A Dkernel-name-restriction.rst14 `Intel FPGA SDK for OpenCL Pro Edition: Programming Guide
/llvm-project-15.0.7/compiler-rt/test/hwasan/
H A DCMakeLists.txt39 "Running the HWAddressSanitizer tests with Intel LAM"

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