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Searched refs:Instrs (Results 1 – 25 of 44) sorted by relevance

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/llvm-project-15.0.7/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagPredicate.h104 SmallVector<const CodeGenInstruction *, 4> Instrs; variable
109 void addOpcode(const CodeGenInstruction *Instr) { Instrs.push_back(Instr); } in addOpcode()
116 return Instrs; in getInstrs()
H A DGIMatchDagPredicate.cpp44 for (const CodeGenInstruction *Instr : Instrs) { in printDescription()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DExecutionDomainFix.h66 SmallVector<MachineInstr *, 8> Instrs; member
72 bool isCollapsed() const { return Instrs.empty(); } in isCollapsed()
112 Instrs.clear(); in clear()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DExecutionDomainFix.cpp116 while (!dv->Instrs.empty()) in collapse()
117 TII->setExecutionDomain(*dv->Instrs.pop_back_val(), domain); in collapse()
137 A->Instrs.append(B->Instrs.begin(), B->Instrs.end()); in merge()
379 dv->Instrs.push_back(mi); in visitSoftInstr()
H A DMachineTraceMetrics.cpp1213 unsigned Instrs = TBI.InstrDepth; in getResourceDepth() local
1216 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount; in getResourceDepth()
1218 Instrs /= IW; in getResourceDepth()
1220 return std::max(Instrs, PRMax); in getResourceDepth()
1237 for (const MCSchedClassDesc *SC : Instrs) { in getResourceLength()
1265 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight; in getResourceLength() local
1268 Instrs += TE.MTM.getResources(MBB)->InstrCount; in getResourceLength()
1269 Instrs += ExtraInstrs.size(); in getResourceLength()
1270 Instrs -= RemoveInstrs.size(); in getResourceLength()
1272 Instrs /= IW; in getResourceLength()
[all …]
H A DMachineCombiner.cpp116 void instr2instrSC(SmallVectorImpl<MachineInstr *> &Instrs,
430 SmallVectorImpl<MachineInstr *> &Instrs, in instr2instrSC() argument
432 for (auto *InstrPtr : Instrs) { in instr2instrSC()
H A DCFIInstrInserter.cpp182 const std::vector<MCCFIInstruction> &Instrs = MF->getFrameInstructions(); in calculateOutgoingCFAInfo() local
193 const MCCFIInstruction &CFI = Instrs[CFIIndex]; in calculateOutgoingCFAInfo()
H A DMachineOutliner.cpp662 const std::vector<MCCFIInstruction> &Instrs = in createOutlinedFunction() local
673 MCCFIInstruction CFI = Instrs[CFIIndex]; in createOutlinedFunction()
/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DLoadStoreVectorizer.cpp176 bool vectorizeInstructions(ArrayRef<Instruction *> Instrs);
646 SmallVector<Instruction *, 16> Instrs; in eraseInstructions() local
650 Instrs.push_back(I); in eraseInstructions()
652 Instrs.push_back(GEP); in eraseInstructions()
656 for (Instruction *I : Instrs) in eraseInstructions()
927 LLVM_DEBUG(dbgs() << "LSV: Vectorizing " << Instrs.size() in vectorizeInstructions()
934 for (int i = 0, e = Instrs.size(); i < e; ++i) { in vectorizeInstructions()
940 if (isConsecutiveAccess(Instrs[i], Instrs[j])) { in vectorizeInstructions()
959 if (InstructionsProcessed.count(Instrs[Head])) in vectorizeInstructions()
976 if (InstructionsProcessed.count(Instrs[I])) in vectorizeInstructions()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp567 ArrayRef<MCCFIInstruction> Instrs) const override { in generateCompactUnwindEncoding()
568 if (Instrs.empty()) in generateCompactUnwindEncoding()
576 for (size_t i = 0, e = Instrs.size(); i != e; ++i) { in generateCompactUnwindEncoding()
577 const MCCFIInstruction &Inst = Instrs[i]; in generateCompactUnwindEncoding()
598 const MCCFIInstruction &LRPush = Instrs[++i]; in generateCompactUnwindEncoding()
601 const MCCFIInstruction &FPPush = Instrs[++i]; in generateCompactUnwindEncoding()
640 const MCCFIInstruction &Inst2 = Instrs[++i]; in generateCompactUnwindEncoding()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp239 std::string Instrs = InstrsForCase[i]; in FindUniqueOperandCommands() local
240 if (Instrs.size() > 70) { in FindUniqueOperandCommands()
241 Instrs.erase(Instrs.begin()+70, Instrs.end()); in FindUniqueOperandCommands()
242 Instrs += "..."; in FindUniqueOperandCommands()
245 if (!Instrs.empty()) in FindUniqueOperandCommands()
246 UniqueOperandCommands[i] = " // " + Instrs + "\n" + in FindUniqueOperandCommands()
H A DCodeGenDAGPatterns.cpp3752 getInstructionsInTree(TreePatternNode *Tree, SmallVectorImpl<Record*> &Instrs) { in getInstructionsInTree() argument
3756 Instrs.push_back(Tree->getOperator()); in getInstructionsInTree()
3758 getInstructionsInTree(Tree->getChild(i), Instrs); in getInstructionsInTree()
3963 std::vector<Record*> Instrs = Records.getAllDerivedDefinitions("Instruction"); in ParseInstructions() local
3965 for (Record *Instr : Instrs) { in ParseInstructions()
4153 SmallVector<Record*, 8> Instrs; in VerifyInstructionFlags() local
4154 getInstructionsInTree(PTM.getDstPattern(), Instrs); in VerifyInstructionFlags()
4155 if (Instrs.empty()) in VerifyInstructionFlags()
4162 for (const Record *Instr : Instrs) { in VerifyInstructionFlags()
4197 (Instrs.size() == 1 ? in VerifyInstructionFlags()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackendDarwin.h36 ArrayRef<MCCFIInstruction> Instrs) const override;
H A DARMAsmBackend.cpp1111 ArrayRef<MCCFIInstruction> Instrs) const { in generateCompactUnwindEncoding()
1117 if (Instrs.empty()) in generateCompactUnwindEncoding()
1126 for (const MCCFIInstruction &Inst : Instrs) { in generateCompactUnwindEncoding()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp147 SmallVector<MachineInstr*, 4> Instrs; member
181 ArrayRef<MachineInstr*> Instrs);
187 ArrayRef<MachineInstr*> Instrs) const;
632 ArrayRef<MachineInstr*> Instrs) { in CreateLoadStoreMulti() argument
829 MIB.cloneMergedMemRefs(Instrs); in CreateLoadStoreMulti()
839 ArrayRef<MachineInstr*> Instrs) const { in CreateLoadStoreDouble()
855 MIB.cloneMergedMemRefs(Instrs); in CreateLoadStoreDouble()
869 for (const MachineInstr *MI : Cand.Instrs) { in MergeOpsUpdate()
914 Cand.Instrs); in MergeOpsUpdate()
932 for (MachineInstr *MI : Cand.Instrs) in MergeOpsUpdate()
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/llvm-project-15.0.7/bolt/lib/Passes/
H A DInstrumentation.cpp187 BinaryBasicBlock::iterator insertInstructions(InstructionListType &Instrs, in insertInstructions() argument
190 for (MCInst &NewInst : Instrs) { in insertInstructions()
595 [&](StringRef Title, InstructionListType Instrs) -> BinaryFunction * { in createAuxiliaryFunctions() argument
600 BBs.back()->addInstructions(Instrs.begin(), Instrs.end()); in createAuxiliaryFunctions()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp468 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle); in getFixupNoBits() local
469 for (auto I = Instrs.begin(), N = Instrs.end(); I != N; ++I) { in getFixupNoBits()
730 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle); in getMachineOpValue() local
731 const MCOperand *I = Instrs.begin() + State.Index - 1; in getMachineOpValue()
734 assert(I != Instrs.begin() - 1 && "Couldn't find producer"); in getMachineOpValue()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp305 SmallVector<MachineInstr *, 8> Instrs; member in __anonc7e7f4590111::Closure
342 Instrs.push_back(I); in addInstruction()
346 return Instrs; in instructions()
359 for (MachineInstr *MI : Instrs) { in dump()
/llvm-project-15.0.7/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyTIL.h1537 Args(std::move(As)), Instrs(std::move(Is)), TermInstr(T) {} in BasicBlock()
1557 InstrArray &instructions() { return Instrs; } in instructions()
1558 const InstrArray &instructions() const { return Instrs; } in instructions()
1590 Instrs.reserveCheck(1, Arena); in addInstruction()
1591 Instrs.push_back(V); in addInstruction()
1602 void reserveInstructions(unsigned Nins) { Instrs.reserve(Nins, Arena); } in reserveInstructions()
1616 typename V::template Container<SExpr*> Nis(Vs, Instrs.size()); in traverse()
1625 for (const auto *E : Instrs) { in traverse()
1673 InstrArray Instrs; variable
/llvm-project-15.0.7/bolt/test/X86/
H A Dcfi-instrs-count.s9 # CHECK: CFI Instrs : 6
/llvm-project-15.0.7/bolt/lib/Target/X86/
H A DX86MCPlusBuilder.cpp3192 Instrs.resize(IsLeaf ? 13 : 11); in createInstrIncMemory()
3195 createStackPointerIncrement(Instrs[I++], 128, in createInstrIncMemory()
3202 createPushRegister(Instrs[I++], X86::RAX, 8); in createInstrIncMemory()
3204 createX86Lahf(Instrs[I++]); in createInstrIncMemory()
3205 createPushRegister(Instrs[I++], X86::RAX, 8); in createInstrIncMemory()
3209 createIncMemory(Instrs[I++], Target, Ctx); in createInstrIncMemory()
3211 createAddRegImm(Instrs[I++], X86::AL, 127, 1); in createInstrIncMemory()
3212 createPopRegister(Instrs[I++], X86::RAX, 8); in createInstrIncMemory()
3213 createX86Sahf(Instrs[I++]); in createInstrIncMemory()
3214 createPopRegister(Instrs[I++], X86::RAX, 8); in createInstrIncMemory()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kInstrShiftRotate.td1 //===-- M68kInstrShiftRotate.td - Logical Instrs -----------*- tablegen -*-===//
H A DM68kInstrBits.td1 //===-- M68kInstrBits.td - Bit Manipulation Instrs ---------*- tablegen -*-===//
/llvm-project-15.0.7/clang/lib/Analysis/
H A DThreadSafetyTIL.cpp155 for (auto *Instr : Instrs) in renumberInstrs()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp1357 generateCompactUnwindEncoding(ArrayRef<MCCFIInstruction> Instrs) const override { in generateCompactUnwindEncoding()
1358 if (Instrs.empty()) return 0; in generateCompactUnwindEncoding()
1375 for (const MCCFIInstruction &Inst : Instrs) { in generateCompactUnwindEncoding()

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