| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | DFAPacketizer.h | 40 class InstrItineraryData; variable
50 const InstrItineraryData *InstrItins;
57 DFAPacketizer(const InstrItineraryData *InstrItins, Automaton<uint64_t> a, in DFAPacketizer()
101 const InstrItineraryData *getInstrItins() const { return InstrItins; } in getInstrItins()
|
| H A D | ScoreboardHazardRecognizer.h | 94 const InstrItineraryData *ItinData;
108 ScoreboardHazardRecognizer(const InstrItineraryData *II,
|
| H A D | TargetSchedule.h | 34 InstrItineraryData InstrItins;
82 const InstrItineraryData *getInstrItineraries() const { in getInstrItineraries()
|
| H A D | ResourcePriorityQueue.h | 23 class InstrItineraryData; variable
62 const InstrItineraryData* InstrItins;
|
| H A D | TargetInstrInfo.h | 42 class InstrItineraryData; variable
1519 CreateTargetMIHazardRecognizer(const InstrItineraryData *,
1525 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *,
1589 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
1600 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1612 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1620 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1626 virtual int getInstrLatency(const InstrItineraryData *ItinData,
|
| H A D | TargetSubtargetInfo.h | 33 class InstrItineraryData; variable
133 virtual const InstrItineraryData *getInstrItineraryData() const { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 134 CreateTargetMIHazardRecognizer(const InstrItineraryData *II,
315 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
318 int getOperandLatency(const InstrItineraryData *ItinData,
322 int getOperandLatency(const InstrItineraryData *ItinData,
423 int getVLDMDefCycle(const InstrItineraryData *ItinData,
427 int getLDMDefCycle(const InstrItineraryData *ItinData,
431 int getVSTMUseCycle(const InstrItineraryData *ItinData,
435 int getSTMUseCycle(const InstrItineraryData *ItinData,
439 int getOperandLatency(const InstrItineraryData *ItinData,
454 unsigned getInstrLatency(const InstrItineraryData *ItinData,
[all …]
|
| H A D | ARMSubtarget.h | 225 InstrItineraryData InstrItins;
491 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 109 class InstrItineraryData {
119 InstrItineraryData() = default;
120 InstrItineraryData(const MCSchedModel &SM, const InstrStage *S, in InstrItineraryData() function
|
| H A D | MCSchedule.h | 28 class InstrItineraryData; variable
310 friend class InstrItineraryData; member
367 getReciprocalThroughput(unsigned SchedClass, const InstrItineraryData &IID);
|
| H A D | MCSubtargetInfo.h | 214 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
217 void initInstrItins(InstrItineraryData &InstrItins) const;
|
| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 327 InstrItineraryData
330 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
333 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { in initInstrItins()
334 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles, in initInstrItins()
|
| H A D | MCSchedule.cpp | 135 const InstrItineraryData &IID) { in getReciprocalThroughput()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600Subtarget.h | 43 InstrItineraryData InstrItins;
64 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 57 InstrItineraryData InstrItins;
163 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.h | 30 class InstrItineraryData; variable
50 const InstrItineraryData *InstrItins;
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 265 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
279 unsigned getInstrLatency(const InstrItineraryData *ItinData,
311 int getOperandLatency(const InstrItineraryData *ItinData,
458 unsigned getInstrTimingClassLatency(const InstrItineraryData *ItinData,
|
| H A D | HexagonHazardRecognizer.h | 48 HexagonHazardRecognizer(const InstrItineraryData *II, in HexagonHazardRecognizer()
|
| H A D | HexagonSubtarget.h | 108 InstrItineraryData InstrItins;
121 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.h | 211 InstrItineraryData InstrItins;
395 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
|
| H A D | PPCInstrInfo.h | 406 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
409 unsigned getInstrLatency(const InstrItineraryData *ItinData,
413 int getOperandLatency(const InstrItineraryData *ItinData,
417 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
|
| H A D | PPCSubtarget.h | 88 InstrItineraryData InstrItins;
210 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1058 const InstrItineraryData *II, const ScheduleDAGMI *DAG) const { in CreateTargetMIHazardRecognizer()
1064 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer()
1088 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
1104 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
1119 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps()
1150 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
1164 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency()
1256 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
|
| H A D | ScoreboardHazardRecognizer.cpp | 31 const InstrItineraryData *II, const ScheduleDAG *SchedDAG, in ScoreboardHazardRecognizer()
|