Searched refs:InputVT (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3860 EVT InputVT = LHS.getValueType(); in getSETCCInGPR() local
3861 if (InputVT != MVT::i32 && InputVT != MVT::i64) in getSETCCInGPR()
3866 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
3868 bool Inputs32Bit = InputVT == MVT::i32; in getSETCCInGPR()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16969 SDValue InputVT = DAG.getValueType(DataVT); in performST1Combine() local
16972 InputVT = DAG.getValueType(HwSrcVt); in performST1Combine()
16984 InputVT in performST1Combine()
19011 SDValue InputVT = DAG.getValueType(SrcVT); in performScatterStoreCombine() local
19013 InputVT = DAG.getValueType(HwSrcVt); in performScatterStoreCombine()
19028 InputVT}; in performScatterStoreCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 14024 MVT InputVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits), NumElements); in lowerShuffleAsSpecificZeroOrAnyExtend() local
14025 SDValue Ext = AnyExt ? DAG.getUNDEF(InputVT) in lowerShuffleAsSpecificZeroOrAnyExtend()
14026 : getZeroVector(InputVT, Subtarget, DAG, DL); in lowerShuffleAsSpecificZeroOrAnyExtend()
14027 InputV = DAG.getBitcast(InputVT, InputV); in lowerShuffleAsSpecificZeroOrAnyExtend()
14028 InputV = DAG.getNode(UnpackLoHi, DL, InputVT, InputV, Ext); in lowerShuffleAsSpecificZeroOrAnyExtend()
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