| /llvm-project-15.0.7/llvm/docs/PDB/ |
| H A D | index.rst | 90 | PDB Stream | - Fixed Stream Index 1 | - Basic File Information | 97 | DBI Stream | - Fixed Stream Index 3 | - Module/Compiland Information | 100 | | | - Section Contribution Information | 101 | | | - Source File Information | 137 Information about the PDB Info Stream and how it is used to match PDBs to EXEs. 140 Information about the TPI stream and the CodeView records contained within. 143 Information about the DBI stream and relevant substreams including the 148 Information about the Module Information Stream, of which there is one for 152 Information about the Public Symbol Stream. 155 Information about the Global Symbol Stream. [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | llc-pipeline.ll | 17 ; GCN-O0:Target Library Information 19 ; GCN-O0-NEXT:Machine Module Information 20 ; GCN-O0-NEXT:Target Transform Information 147 ; GCN-O1:Target Library Information 149 ; GCN-O1-NEXT:Machine Module Information 150 ; GCN-O1-NEXT:Target Transform Information 404 ; GCN-O1-OPTS:Target Library Information 694 ; GCN-O2:Target Library Information 696 ; GCN-O2-NEXT:Machine Module Information 987 ; GCN-O3:Target Library Information [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | O3-pipeline.ll | 7 ; CHECK-NEXT: Target Library Information 9 ; CHECK-NEXT: Machine Module Information 10 ; CHECK-NEXT: Target Transform Information 28 ; CHECK-NEXT: Natural Loop Information 57 ; CHECK-NEXT: Natural Loop Information 65 ; CHECK-NEXT: Natural Loop Information 75 ; CHECK-NEXT: Natural Loop Information 94 ; CHECK-NEXT: Natural Loop Information 109 ; CHECK-NEXT: Natural Loop Information 235 ; CHECK-NEXT: Target Library Information [all …]
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| H A D | O0-pipeline.ll | 7 ; CHECK-NEXT: Target Library Information 9 ; CHECK-NEXT: Machine Module Information 10 ; CHECK-NEXT: Target Transform Information
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | O3-pipeline.ll | 11 ; CHECK-NEXT: Target Library Information 13 ; CHECK-NEXT: Machine Module Information 14 ; CHECK-NEXT: Target Transform Information 27 ; CHECK-NEXT: Natural Loop Information 41 ; CHECK-NEXT: Natural Loop Information 49 ; CHECK-NEXT: Natural Loop Information 59 ; CHECK-NEXT: Natural Loop Information 72 ; CHECK-NEXT: Natural Loop Information
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| H A D | O0-pipeline.ll | 11 ; CHECK-NEXT: Target Library Information 13 ; CHECK-NEXT: Machine Module Information 14 ; CHECK-NEXT: Target Transform Information
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | O3-pipeline.ll | 7 ; CHECK-NEXT: Target Library Information 9 ; CHECK-NEXT: Machine Module Information 10 ; CHECK-NEXT: Target Transform Information 26 ; CHECK-NEXT: Natural Loop Information 49 ; CHECK-NEXT: Natural Loop Information 57 ; CHECK-NEXT: Natural Loop Information 67 ; CHECK-NEXT: Natural Loop Information 72 ; CHECK-NEXT: Natural Loop Information 85 ; CHECK-NEXT: Natural Loop Information
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | opt-pipeline.ll | 15 ; CHECK-NEXT: Target Library Information 17 ; CHECK-NEXT: Machine Module Information 18 ; CHECK-NEXT: Target Transform Information 35 ; CHECK-NEXT: Natural Loop Information 45 ; CHECK-NEXT: Natural Loop Information 53 ; CHECK-NEXT: Natural Loop Information 63 ; CHECK-NEXT: Natural Loop Information 68 ; CHECK-NEXT: Natural Loop Information 77 ; CHECK-NEXT: Natural Loop Information
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| H A D | O0-pipeline.ll | 9 ; CHECK-NEXT: Target Library Information 11 ; CHECK-NEXT: Machine Module Information 12 ; CHECK-NEXT: Target Transform Information
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| /llvm-project-15.0.7/clang/ |
| H A D | README.txt | 16 Information on Clang: http://clang.llvm.org/ 19 Information on the LLVM project: http://llvm.org/
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| H A D | CODE_OWNERS.TXT | 30 D: Debug Information, inline assembly
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | UserGuides.rst | 120 Information on how to write LLVM transformations and analyses. 123 Information on how to write LLVM transformations under the new pass 137 Information on how to write a new alias analysis implementation or how to 141 Information about the MemorySSA utility in LLVM, as well as how to use it. 179 Information on how to write LLVM backends for machine targets.
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| H A D | Reference.rst | 109 Information on writing and using Fuzzers to find bugs in LLVM. 164 Information about LLVM's concurrency model. 182 Provides information about Branch Prediction Information.
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | O3-pipeline.ll | 11 ; CHECK-NEXT: Natural Loop Information 25 ; CHECK-NEXT: Natural Loop Information 33 ; CHECK-NEXT: Natural Loop Information 43 ; CHECK-NEXT: Natural Loop Information 55 ; CHECK-NEXT: Natural Loop Information 72 ; CHECK-NEXT: Natural Loop Information
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| /llvm-project-15.0.7/llvm/test/Transforms/GVN/ |
| H A D | preserve-analysis.ll | 8 ; CHECK: Natural Loop Information 14 ; CHECK-NOT: Natural Loop Information
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| /llvm-project-15.0.7/llvm/include/llvm/Frontend/Directive/ |
| H A D | DirectiveBase.td | 54 // Information about values accepted by enum-like clauses 69 // Information about a specific clause. 130 // Information about a specific directive.
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/DLTI/ |
| H A D | DLTIBase.td | 20 The Data Layout and Target Information (DLTI) dialect is intended to hold
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| /llvm-project-15.0.7/clang/docs/ |
| H A D | LeakSanitizer.rst | 55 More Information
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/ |
| H A D | bottleneck-hints-2.s | 27 # CHECK: Instruction Dependency Information
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| H A D | bottleneck-hints-4.s | 29 # CHECK: Instruction Dependency Information
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| H A D | bottleneck-hints-1.s | 28 # CHECK: Instruction Dependency Information
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| /llvm-project-15.0.7/llvm/bindings/ocaml/llvm/ |
| H A D | META.llvm.in | 99 description = "Target Information for LLVM"
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/ |
| H A D | option-all-views-1.s | 30 …ULLREPORT: Instruction Dependency Information
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| H A D | option-all-views-2.s | 29 # ALL: Instruction Dependency Information
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| /llvm-project-15.0.7/flang/docs/ |
| H A D | ReleaseNotes.md | 51 ## Additional Information
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