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Searched refs:INS4 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dbroadcast.ll62 ; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> z…
63 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
168 ; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i64 0
169 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
H A Dbroadcast-inseltpoison.ll62 ; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> z…
63 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
168 ; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i64 0
169 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dscalable-vector.ll123 ; CHECK-NEXT: [[INS4:%.*]] = insertelement <vscale x 4 x i8> [[INS3]], i8 [[Y2Y2]], i32 3
124 ; CHECK-NEXT: ret <vscale x 4 x i8> [[INS4]]
/llvm-project-15.0.7/compiler-rt/lib/fuzzer/tests/
H A DFuzzerUnittest.cpp182 uint8_t INS4[8] = {0x00, 0x11, 0x22, 0x33, 0xF5, 0x44, 0x55, 0x66}; in TestInsertByte() local
193 if (NewSize == 8 && !memcmp(INS4, T, 8)) FoundMask |= 1 << 4; in TestInsertByte()
218 uint8_t INS4[7] = {'a', 'a', 'a', 0x00, 0x11, 0x22, 0x33}; in TestInsertRepeatedBytes() local
233 if (NewSize == 7 && !memcmp(INS4, T, 7)) FoundMask |= 1 << 4; in TestInsertRepeatedBytes()
/llvm-project-15.0.7/llvm/test/Transforms/InterleavedAccess/AArch64/
H A Dsve-interleaved-accesses.ll112 ; CHECK-NEXT: [[INS4:%.*]] = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.v4i64(<vscal…
114 …le x 2 x i64> [[INS2]], <vscale x 2 x i64> [[INS3]], <vscale x 2 x i64> [[INS4]], <vscale x 2 x i1…
239 ; CHECK-NEXT: [[INS4:%.*]] = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.v4i64(<vscal…
241 …le x 2 x i64> [[INS2]], <vscale x 2 x i64> [[INS3]], <vscale x 2 x i64> [[INS4]], <vscale x 2 x i1…
287 ; CHECK-NEXT: [[INS4:%.*]] = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.v4i64(<vscal…
289 …aarch64.sve.st2.nxv2i64(<vscale x 2 x i64> [[INS3]], <vscale x 2 x i64> [[INS4]], <vscale x 2 x i1…