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/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dsve-tail-folding-reductions.ll51 ; CHECK-IN-LOOP-NEXT: entry:
58 ; CHECK-IN-LOOP: vector.ph:
69 ; CHECK-IN-LOOP: vector.body:
88 ; CHECK-IN-LOOP: middle.block:
150 ; CHECK-IN-LOOP-NEXT: entry:
157 ; CHECK-IN-LOOP: vector.ph:
168 ; CHECK-IN-LOOP: vector.body:
186 ; CHECK-IN-LOOP: middle.block:
257 ; CHECK-IN-LOOP-NEXT: entry:
263 ; CHECK-IN-LOOP: vector.ph:
[all …]
/llvm-project-15.0.7/compiler-rt/test/fuzzer/
H A Donly-some-bytes.test17 DISABLED: mkdir -p %t/IN
18 DISABLED: echo -n 0123456789012345678901234567890123456789012345678901234567891234 > %t/IN/6
19 DISABLED: cat %t/IN/6 %t/IN/6 %t/IN/6 %t/IN/6 > %t/IN/8
20 DISABLED: cat %t/IN/8 %t/IN/8 %t/IN/8 %t/IN/8 > %t/IN/10
21 DISABLED: cat %t/IN/10 %t/IN/10 %t/IN/10 %t/IN/10 > %t/IN/12
22 # %t/IN/12 is 4096 bytes-long.
27 DISABLED: %t-Fuzz -focus_function=f0 -runs=0 %t/IN 2>&1 | FileCheck %s --check-prefix=NO_FOCUSED_IN…
31 DISABLED: (echo -n ABC; cat %t/IN/12) > %t/IN/ABC
32 DISABLED: %t-Fuzz -focus_function=f0 -runs=0 %t/IN 2>&1 | FileCheck %s --check-prefix=ONE_FOCUSED_I…
36 DISABLED: %t-Fuzz -collect_data_flow=%t-DFT %t/IN -data_flow_trace=%t/IN_DFT > /dev/null 2>&1
[all …]
H A Ddataflow.test22 RUN: rm -rf %t/IN %t/IN20
23 RUN: mkdir -p %t/IN %t/IN20
24 RUN: echo -n ABC > %t/IN/ABC
25 RUN: echo -n FUABC > %t/IN/FUABC
26 RUN: echo -n FUZZR > %t/IN/FUZZR
27 RUN: echo -n FUZZM > %t/IN/FUZZM
28 RUN: echo -n FUZZMU > %t/IN/FUZZMU
29 RUN: echo -n 1234567890123456 > %t/IN/1234567890123456
123 RUN: printf "%0.sA" {1..150001} > %t/IN/very_long_input
126 RUN: rm %t/IN/very_long_input
[all …]
H A DOnlySomeBytesTest.cpp14 typedef const uint8_t *IN; typedef
25 __attribute__((noinline)) void f0(IN in) { in f0()
39 __attribute__((noinline)) void fD(IN in) { f0(in); } in fD()
40 __attribute__((noinline)) void fC(IN in) { if (in[2] == 'C') fD(in); } in fC()
41 __attribute__((noinline)) void fB(IN in) { if (in[1] == 'B') fC(in); } in fB()
42 __attribute__((noinline)) void fA(IN in) { if (in[0] == 'A') fB(in); } in fA()
46 fA((IN)Data); in LLVMFuzzerTestOneInput()
H A DOutOfProcessFuzzTarget.cpp51 static std::string *Run, *IN, *COV; variable
55 unlink(IN->c_str()); in TearDown()
59 IN = new std::string("lf-oop-in-" + std::to_string(getpid())); in Initialize()
66 Run = new std::string("SANCOV_OUT=" + *COV + " " + TargetEnv + " " + *IN); in Initialize()
76 if (FILE *f = fopen(IN->c_str(), "w")) { in LLVMFuzzerTestOneInput()
/llvm-project-15.0.7/clang/lib/Rewrite/
H A DDeltaTree.cpp231 auto *IN = cast<DeltaTreeInteriorNode>(this); in DoInsertion() local
242 memmove(&IN->Children[i+2], &IN->Children[i+1], in DoInsertion()
243 (e-i)*sizeof(IN->Children[0])); in DoInsertion()
244 IN->Children[i] = InsertRes->LHS; in DoInsertion()
245 IN->Children[i+1] = InsertRes->RHS; in DoInsertion()
257 IN->Children[i] = InsertRes->LHS; in DoInsertion()
283 (e-i)*sizeof(IN->Children[0])); in DoInsertion()
347 if (IN == 0) { in VerifyTree()
380 FullDelta += IN->getChild(IN->getNumValuesUsed())->getFullDelta(); in VerifyTree()
431 if (!IN) return Result; in getDeltaAt()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsincospi.ll22 ; CHECK-FLOAT-IN-VEC-LABEL: @test_instbased_f32(
29 ; CHECK-FLOAT-IN-VEC-NEXT: [[RES:%.*]] = fadd float [[SINPI]], [[COSPI]]
30 ; CHECK-FLOAT-IN-VEC-NEXT: ret float [[RES]]
59 ; CHECK-FLOAT-IN-VEC-LABEL: @test_constant_f32(
66 ; CHECK-FLOAT-IN-VEC-NEXT: ret float [[RES]]
92 ; CHECK-FLOAT-IN-VEC-LABEL: @test_instbased_f64(
100 ; CHECK-FLOAT-IN-VEC-NEXT: ret double [[RES]]
129 ; CHECK-FLOAT-IN-VEC-LABEL: @test_constant_f64(
136 ; CHECK-FLOAT-IN-VEC-NEXT: ret double [[RES]]
162 ; CHECK-FLOAT-IN-VEC-LABEL: @test_fptr(
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A Dreplace-intrinsics-with-veclib.ll12 ; SVML-SAME: (<4 x double> [[IN:%.*]]) {
17 ; LIBMVEC-X86-SAME: (<4 x double> [[IN:%.*]]) {
22 ; MASSV-SAME: (<4 x double> [[IN:%.*]]) {
27 ; ACCELERATE-SAME: (<4 x double> [[IN:%.*]]) {
39 ; SVML-SAME: (<4 x float> [[IN:%.*]]) {
44 ; LIBMVEC-X86-SAME: (<4 x float> [[IN:%.*]]) {
49 ; MASSV-SAME: (<4 x float> [[IN:%.*]]) {
54 ; ACCELERATE-SAME: (<4 x float> [[IN:%.*]]) {
67 ; COMMON-SAME: (double [[IN:%.*]]) {
81 ; COMMON-SAME: (<4 x double> [[IN:%.*]]) {
[all …]
H A Dreplace-intrinsics-with-veclib-darwin-libsystem-m.ll9 ; CHECK-SAME: (<4 x float> [[IN:%.*]]) {
10 ; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_sin_f4(<4 x float> [[IN]])
20 ; CHECK-SAME: (<2 x double> [[IN:%.*]]) {
21 ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_sin_d2(<2 x double> [[IN]])
32 ; CHECK-SAME: (<2 x double> [[IN:%.*]]) {
33 ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_exp_d2(<2 x double> [[IN]])
44 ; CHECK-SAME: (<4 x float> [[IN:%.*]]) {
45 ; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_exp_f4(<4 x float> [[IN]])
56 ; CHECK-SAME: (<3 x double> [[IN:%.*]]) {
57 ; CHECK-NEXT: [[CALL:%.*]] = call <3 x double> @llvm.exp.v3f64(<3 x double> [[IN]])
/llvm-project-15.0.7/lld/test/ELF/
H A Daarch64-adrp-add.s17 # IN-RANGE-LOW: nop
18 # IN-RANGE-LOW-NEXT: adr x30
19 # IN-RANGE-LOW-NEXT: adrp x1
20 # IN-RANGE-LOW-NEXT: add x1
21 # IN-RANGE-LOW-NEXT: adrp x15
22 # IN-RANGE-LOW-NEXT: add x15
25 # IN-RANGE-LOW-NEXT: adrp x2
29 # IN-RANGE-LOW-NEXT: adrp x2
35 # IN-RANGE-HIGH: nop
37 # IN-RANGE-HIGH-NEXT: nop
[all …]
/llvm-project-15.0.7/clang/utils/analyzer/
H A Dupdate_plist_test.pl19 open (IN, $testFile) or die "cannot open $testFile\n";
20 while (<IN>) {
24 close(IN);
27 open (IN, $plistFile) or die "cannot open $plistFile\n";
30 while (<IN>) {
48 close (IN);
/llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/ARM/
H A Dfptosisat.ll8 ; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i64
31 ; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i64
54 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i32
67 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i32
80 ; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i64
104 ; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i64
117 ; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i32
130 ; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64
153 ; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64
176 ; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i32
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dtile-pad-tensor-op.mlir11 // TILE2-SAME: %[[IN:.*]]: tensor<?x?xf32>
16 // TILE2: %[[DIM_IN0:.*]] = tensor.dim %[[IN]], %[[C0]]
18 // TILE2: %[[DIM_IN1:.*]] = tensor.dim %[[IN]], %[[C1]]
25 // TILE2: %[[SLICE:.*]] = tensor.extract_slice %[[IN]][{{.*}}, {{.*}}] [{{.*}}, {{.*}…
33 // TILE1-SAME: %[[IN:.*]]: tensor<?x?xf32>
37 // TILE1: %[[DIM_IN1:.*]] = tensor.dim %[[IN]], %[[C1]]
39 // TILE1: %[[DIM_IN0:.*]] = tensor.dim %[[IN]], %[[C0]]
62 // TILE2-SAME: %[[IN:.*]]: tensor<7x9xf32>
80 // TILE1-SAME: %[[IN:.*]]: tensor<7x9xf32>
88 // TILE1: %[[SLICE:.*]] = tensor.extract_slice %[[IN]][0, {{.*}}] [7, {{.*}}] [1, 1]
[all …]
H A Dgeneralize-pad-tensor.mlir4 // CHECK-SAME: %[[IN:.*]]: tensor<1x28x28x1xf32>) -> te…
8 // CHECK: %[[PADDED:.*]] = tensor.insert_slice %[[IN]] into %[[FILL]][0, 2, 2, 0] [1, 28,…
20 // CHECK-SAME: %[[IN:.*]]: tensor<4x?x2x?xf32>,
27 // CHECK: %[[DIM1:.*]] = tensor.dim %[[IN]], %[[C1]] : tensor<4x?x2x?xf32>
29 // CHECK: %[[DIM3:.*]] = tensor.dim %[[IN]], %[[C3]] : tensor<4x?x2x?xf32>
33 // CHECK: %[[DIM1_1:.*]] = tensor.dim %[[IN]], %[[C1]] : tensor<4x?x2x?xf32>
34 // CHECK: %[[DIM3_1:.*]] = tensor.dim %[[IN]], %[[C3]] : tensor<4x?x2x?xf32>
35 // CHECK: %[[PADDED:.*]] = tensor.insert_slice %[[IN]] into %[[FILL]]{{\[}}%[[C0]], %[[C0…
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dimm-peephole-thumb.mir3 # CHECK: [[IN:%.*]]:gprnopc = COPY $r0
4 # CHECK: [[SUM1TMP:%.*]]:rgpr = t2ADDri [[IN]], 25600
7 # CHECK: [[SUM2TMP:%.*]]:rgpr = t2SUBri [[IN]], 25600
10 # CHECK: [[SUM3TMP:%.*]]:rgpr = t2SUBri [[IN]], 25600
13 # CHECK: [[SUM4TMP:%.*]]:rgpr = t2ADDri killed [[IN]], 25600
H A Dimm-peephole-arm.mir3 # CHECK: [[IN:%.*]]:gprnopc = COPY $r0
4 # CHECK: [[SUM1TMP:%.*]]:rgpr = ADDri [[IN]], 133
7 # CHECK: [[SUM2TMP:%.*]]:rgpr = SUBri [[IN]], 133
10 # CHECK: [[SUM3TMP:%.*]]:rgpr = SUBri [[IN]], 133
13 # CHECK: [[SUM4TMP:%.*]]:rgpr = ADDri killed [[IN]], 133
/llvm-project-15.0.7/polly/cmake/
H A DFindISL.cmake8 foreach (incl IN LISTS ISL_INCLUDE_DIRS)
12 foreach (libname IN LISTS ISL_LIBRARIES)
14 foreach (dir IN LISTS ISL_LIBRARY_DIRS)
22 foreach (opt IN LISTS ISL_CFLAGS ISL_CFLAGS_OTHER)
/llvm-project-15.0.7/llvm/test/Transforms/LowerMatrixIntrinsics/
H A Dstrided-store-float.ll6 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x float> [[IN:%.*]], <6 x float> poison, <3 x i32…
7 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x float> [[IN]], <6 x float> poison, <3 x i32> <…
21 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x float> [[IN:%.*]], <6 x float> poison, <3 x i32…
22 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x float> [[IN]], <6 x float> poison, <3 x i32> <…
42 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <10 x float> [[IN:%.*]], <10 x float> poison, <2 x i…
43 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> poison, <2 x i32>…
44 ; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> poison, <2 x i32>…
45 ; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> poison, <2 x i32>…
46 ; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> poison, <2 x i32>…
H A Dstrided-store-i32.ll6 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x i32> [[IN:%.*]], <6 x i32> poison, <3 x i32> <i…
7 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x i32> [[IN]], <6 x i32> poison, <3 x i32> <i32 …
21 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x i32> [[IN:%.*]], <6 x i32> poison, <3 x i32> <i…
22 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x i32> [[IN]], <6 x i32> poison, <3 x i32> <i32 …
42 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <10 x i32> [[IN:%.*]], <10 x i32> poison, <2 x i32> …
43 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> poison, <2 x i32> <i3…
44 ; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> poison, <2 x i32> <i3…
45 ; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> poison, <2 x i32> <i3…
46 ; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> poison, <2 x i32> <i3…
H A Dstrided-store-double.ll6 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x double> [[IN:%.*]], <6 x double> poison, <3 x i…
7 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x double> [[IN]], <6 x double> poison, <3 x i32>…
21 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x double> [[IN:%.*]], <6 x double> poison, <3 x i…
22 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x double> [[IN]], <6 x double> poison, <3 x i32>…
39 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x double> [[IN:%.*]], <6 x double> poison, <3 x i…
40 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x double> [[IN]], <6 x double> poison, <3 x i32>…
57 ; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <10 x double> [[IN:%.*]], <10 x double> poison, <2 x…
58 ; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> poison, <2 x i3…
59 ; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> poison, <2 x i3…
60 ; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> poison, <2 x i3…
[all …]
/llvm-project-15.0.7/clang/test/Driver/
H A Dhip-binding.hip10 // NRDCS: # "amdgcn-amd-amdhsa" - "clang", inputs: ["[[IN:.*hip-binding.hip]]"], output: "[[OBJ1:.*…
12 // NRDCS: # "amdgcn-amd-amdhsa" - "clang", inputs: ["[[IN:.*hip-binding.hip]]"], output: "[[OBJ2:.*…
15 // NRDCS: # "x86_64-unknown-linux-gnu" - "clang", inputs: ["[[IN]]", "[[FATBIN]]"], output: "{{.*}}"
20 // RDCS: # "amdgcn-amd-amdhsa" - "clang", inputs: ["[[IN:.*hip-binding.hip]]"], output: "[[BC1:.*bc…
21 // RDCS: # "amdgcn-amd-amdhsa" - "clang", inputs: ["[[IN:.*hip-binding.hip]]"], output: "[[BC2:.*bc…
22 // RDCS: # "x86_64-unknown-linux-gnu" - "clang", inputs: ["[[IN]]"], output: "[[HOSTOBJ:.*o]]"
38 // CHECK: # "x86_64-unknown-linux-gnu" - "offload bundler", inputs: ["[[IN:.*o]]"], outputs: ["[[HO…
39 // CHECK: # "amdgcn-amd-amdhsa" - "offload bundler", inputs: ["[[IN]]"], outputs: ["{{.*o}}", "[[DO…
/llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/AArch64/
H A Dfptosisat.ll19 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i64
32 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i32
45 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i32
70 ; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i64
83 ; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i32
96 ; CHECK-FP-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64
114 ; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64
127 ; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i32
140 ; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i32
226 ; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i64
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/TensorToLinalg/
H A Dtensor-ops-to-linalg.mlir7 // CHECK-SAME: %[[IN:.*]]: tensor<1x28x28x1xf32>) -> te…
11 // CHECK: %[[PADDED:.*]] = tensor.insert_slice %[[IN]] into %[[FILL]][0, 2, 2, 0] [1, 28,…
23 // CHECK-SAME: %[[IN:.*]]: tensor<4x?x2x?xf32>,
28 // CHECK: %[[DIM1:.*]] = tensor.dim %[[IN]], %[[C1]] : tensor<4x?x2x?xf32>
32 // CHECK: %[[DIM3:.*]] = tensor.dim %[[IN]], %[[C3]] : tensor<4x?x2x?xf32>
36 // CHECK: %[[PADDED:.*]] = tensor.insert_slice %[[IN]] into %[[FILL]]{{\[}}%[[C0]], %[[C0…
/llvm-project-15.0.7/lldb/third_party/Python/module/ptyprocess-0.6.0/
H A DLICENSE9 AND THIS PERMISSION NOTICE APPEAR IN ALL COPIES. THE SOFTWARE IS PROVIDED
11 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT
14 WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
15 OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dinsert-crash-index.ll8 ; CHECK-NEXT: [[IN0:%.*]] = load i8, i8* [[IN:%.*]], align 4
9 ; CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds i8, i8* [[IN]], i64 1
29 ; CHECK-NEXT: [[IN0:%.*]] = load i8, i8* [[IN:%.*]], align 4
30 ; CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds i8, i8* [[IN]], i64 1
50 ; CHECK-NEXT: [[IN0:%.*]] = load i8, i8* [[IN:%.*]], align 4
51 ; CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds i8, i8* [[IN]], i64 1

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