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/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dload-combine-like-or.ll13 ; CHECK-NEXT: [[I7:%.*]] = or i16 [[I4]], [[I6]]
14 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
37 ; CHECK-NEXT: [[I7:%.*]] = or i16 [[I3]], [[I6]]
38 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
61 ; CHECK-NEXT: [[I7:%.*]] = or i16 [[I4]], [[I6]]
62 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
141 ; CHECK-NEXT: [[I7:%.*]] = add i16 [[I4]], 42
142 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], [[I6]]
/llvm-project-15.0.7/llvm/test/Transforms/TypePromotion/AArch64/
H A Dloops.ll18 ; CHECK-NEXT: [[I8:%.*]] = load i8, i8* [[I7]], align 1
122 ; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
123 ; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
174 ; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
175 ; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
225 ; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
226 ; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
276 ; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
277 ; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
328 ; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/
H A Dpr48641.ll12 ; CHECK-NEXT: [[I7:%.*]] = icmp sgt i32 [[I6]], 255
15 ; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = select i1 [[I7]], i32 255, i32 [[I10]]
H A Dinvoke_unwind_lifetime.ll30 ; CHECK-NEXT: [[I7:%.*]] = bitcast i32* [[I6]] to i8*
31 ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[I7]])
/llvm-project-15.0.7/clang/test/Index/Core/
H A Dindex-source.m332 @interface I7 interface
336 @implementation I7 // implicit def of field _foo implementation
337 // CHECK: [[@LINE-1]]:17 | instance-property/ObjC | foo | c:objc(cs)I7(py)foo | <no-cgname> | Def,I…
338 // CHECK-NEXT: RelChild | I7 | c:objc(cs)I7
339 // CHECK-NEXT: RelAcc | _foo | c:objc(cs)I7@_foo
340 // CHECK: [[@LINE-4]]:17 | instance-method/acc-get/ObjC | foo | c:objc(cs)I7(im)foo | -[I7 foo] | D…
341 // CHECK-NEXT: RelChild | I7 | c:objc(cs)I7
342 // CHECK: [[@LINE-6]]:17 | instance-method/acc-set/ObjC | setFoo: | c:objc(cs)I7(im)setFoo: | -[I7 …
343 // CHECK-NEXT: RelChild | I7 | c:objc(cs)I7
344 // CHECK: [[@LINE-8]]:17 | field/ObjC | _foo | c:objc(cs)I7@_foo | <no-cgname> | Def,Impl,RelChild …
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dcmov.ll275 ; 32-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
279 ; 32-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
281 ; 32-CMP-DAG: addiu $[[I7:[0-9]+]], $zero, 7
290 ; 64-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
294 ; 64-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
296 ; 64-CMP-DAG: addiu $[[I7:[0-9]+]], $zero, 7
584 ; 32-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
588 ; 32-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
590 ; 32-CMP-DAG: addiu $[[I7:[0-9]+]], $zero, 7
599 ; 64-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/StructurizeCFG/
H A Dinvert-condition.ll41 ; CHECK-NEXT: [[I7:%.*]] = phi i1 [ [[I5]], [[MAIN_BODY:%.*]] ], [ false, [[IF1]] ]
42 ; CHECK-NEXT: [[I7_INV:%.*]] = xor i1 [[I7]], true
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp164 unsigned regInRA = RegInfo.getDwarfRegNum(SP::I7, true); in emitPrologue()
312 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) in verifyLeafProcRegUse()
339 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
364 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
H A DDelaySlotFiller.cpp387 if (reg < SP::I0 || reg > SP::I7) in combineRestoreADD()
415 if (reg < SP::I0 || reg > SP::I7) in combineRestoreOR()
453 if (reg < SP::I0 || reg > SP::I7) in combineRestoreSETHIi()
H A DSparcRegisterInfo.td160 def I7 : Ri<31, "I7">, DwarfRegNum<[31]>;
301 def I6_I7 : Rdi<30, "I6", [I6, I7]>;
H A DSparcRegisterInfo.cpp72 Reserved.set(SP::I7); in getReservedRegs()
H A DSparcCallingConv.td146 let OtherPreserved = (add I6, I7);
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dvec-move-24.ll23 %I7 = insertelement <16 x i8> %I6, i8 %Src, i32 7
24 %I8 = insertelement <16 x i8> %I7, i8 %Src, i32 8
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dphi-aware-aggregate-reconstruction.ll72 ; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 } undef, i32 [[I5]], 0
73 ; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 } [[I7]], i32 [[I6]], 1
119 ; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 } undef, i32 [[I5]], 0
120 ; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 } [[I7]], i32 [[I6]], 1
225 ; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 } undef, i32 [[I5]], 0
226 ; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 } [[I7]], i32 [[I6]], 1
381 ; CHECK-NEXT: [[I7:%.*]] = insertvalue { i32, i32 } undef, i32 [[I0]], 0
382 ; CHECK-NEXT: [[I8:%.*]] = insertvalue { i32, i32 } [[I7]], i32 [[I3]], 1
H A Dmerging-multiple-stores-into-successor.ll26 ; CHECK-NEXT: [[I7:%.*]] = select i1 [[I3]], i64 [[I6]], i64 [[I5]]
27 ; CHECK-NEXT: [[I11:%.*]] = trunc i64 [[I7]] to i32
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dinterface-layout-64.m85 @interface I7 { interface
89 @interface I8 : I7 {
/llvm-project-15.0.7/clang/test/ASTMerge/interface/Inputs/
H A Dinterface2.m37 @interface I7 interface
H A Dinterface1.m38 @interface I7 interface
/llvm-project-15.0.7/llvm/test/Transforms/DeadStoreElimination/
H A Doffsetted-overlapping-stores.ll95 ; CHECK-NEXT: [[I7:%.*]] = getelementptr inbounds float, float* [[ARG]], i64 [[I6]]
96 ; CHECK-NEXT: [[I8:%.*]] = bitcast float* [[I7]] to <2 x float>*
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dlsr-setupcost.ll39 ; CHECK-NEXT: [[I7:%.*]] = icmp sgt i32 [[ADD]], -32768
40 ; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[I7]], i32 [[ADD]], i32 -32768
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dintrinsic.ll214 ; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
215 ; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]]
341 ; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
342 ; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]]
467 ; CHECK-NEXT: [[I7:%.*]] = load float, float* [[ARRAYIDX7]], align 4
468 ; CHECK-NEXT: [[ADD4:%.*]] = fadd float [[I6]], [[I7]]
H A Dmemory-runtime-checks.ll71 ; CHECK-NEXT: [[I7:%.*]] = insertelement <8 x float> [[I4]], float [[L1]], i32 7
72 ; CHECK-NEXT: call void @use(<8 x float> [[I7]])
/llvm-project-15.0.7/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp73 case SP::I7: O << "\tret"; return true; in printSparcAliasInstr()
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dx86-predication.ll302 ; CHECK-NEXT: [[I7:%.*]] = mul i64 [[I]], 777
305 ; CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I7]]
451 ; SINK-GATHER-NEXT: [[I7:%.*]] = mul i64 [[I]], 777
454 ; SINK-GATHER-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I7]]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/
H A Dslp-max-phi-size.ll23 ; MAX32-NEXT: [[I7:%.*]] = fmul float [[I6]], [[FVAL]]
24 ; MAX32-NEXT: [[I8:%.*]] = fadd float 0.000000e+00, [[I7]]

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