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/llvm-project-15.0.7/clang/test/SemaObjC/
H A Dsizeof-interface.m3 @class I0; // expected-note 2{{forward declaration of class here}}
6 int g0 = sizeof(I0); // expected-error{{invalid application of 'sizeof' to an incomplete type 'I0'}}
9 void *g3(I0 *P) {
10 P = P+5; // expected-error {{arithmetic on a pointer to an incomplete type 'I0'}}
12 …4]; // expected-error{{expected method to read array element not found on object of type 'I0 *'}}
17 @interface I0 { interface
26 int g1[ sizeof(I0) // expected-error {{application of 'sizeof' to interface 'I0' is not support…
29 @implementation I0 implementation
35 int g2[ sizeof(I0) // expected-error {{application of 'sizeof' to interface 'I0' is not supported…
53 int bar(I0 *P) {
[all …]
H A Dmissing-atend-metadata.m3 @interface I0 // expected-note {{receiver is instance of class declared here}} interface
6 @implementation I0 // expected-note {{implementation started here}} implementation
9 @interface I1 : I0 // expected-error {{missing '@end'}}
15 @interface I2 : I0 // expected-error {{missing '@end'}}
H A Dproperty-category-1.m39 @interface I0 interface
43 @interface I0 (Cat0) interface in Cat0
46 @interface I0 (Cat1) interface in Cat1
49 @implementation I0 // expected-warning {{property 'p0' requires method 'p0' to be define}} implementation
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsub-from-sub.ll36 ; CHECK-NEXT: call void @use8(i8 [[I0]])
61 ; CHECK-NEXT: [[I0:%.*]] = add i8 [[X:%.*]], -42
73 ; CHECK-NEXT: [[R:%.*]] = add i8 [[I0]], -42
85 ; CHECK-NEXT: [[I0:%.*]] = sub i8 42, [[Y:%.*]]
86 ; CHECK-NEXT: call void @use8(i8 [[I0]])
99 ; CHECK-NEXT: call void @use8(i8 [[I0]])
112 ; CHECK-NEXT: call void @use8(i8 [[I0]])
113 ; CHECK-NEXT: [[R:%.*]] = add i8 [[I0]], -42
149 ; CHECK-NEXT: call void @use8(i8 [[I0]])
162 ; CHECK-NEXT: call void @use8(i8 [[I0]])
[all …]
H A Dlow-bit-splat.ll76 ; CHECK-NEXT: [[I0:%.*]] = shl i8 [[X:%.*]], 7
77 ; CHECK-NEXT: call void @use8(i8 [[I0]])
90 ; CHECK-NEXT: [[I0:%.*]] = and i8 [[X:%.*]], 1
91 ; CHECK-NEXT: call void @use8(i8 [[I0]])
105 ; CHECK-NEXT: [[I0:%.*]] = and i8 [[X:%.*]], 1
106 ; CHECK-NEXT: call void @use8(i8 [[I0]])
121 ; CHECK-NEXT: [[I0:%.*]] = and i8 [[X:%.*]], 3
122 ; CHECK-NEXT: call void @use8(i8 [[I0]])
139 ; CHECK-NEXT: [[I0:%.*]] = shl i8 [[X:%.*]], 6
140 ; CHECK-NEXT: [[R:%.*]] = ashr i8 [[I0]], 7
[all …]
H A Daggregate-reconstruction.ll41 ; CHECK-NEXT: [[I0:%.*]] = extractvalue [3 x i32] [[SRCAGG:%.*]], 0
44 ; CHECK-NEXT: [[I3:%.*]] = insertvalue [3 x i32] undef, i32 [[I0]], 0
91 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
92 ; CHECK-NEXT: [[I2:%.*]] = insertvalue { i32, i32 } undef, i32 [[I0]], 0
106 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
120 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG0:%.*]], 0
140 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
156 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
172 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
186 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[SRCAGG:%.*]], 0
[all …]
H A Dphi-of-extractvalues.ll43 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
44 ; CHECK-NEXT: call void @usei32(i32 [[I0]])
50 ; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
74 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
105 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
106 ; CHECK-NEXT: call void @usei32(i32 [[I0]])
140 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
291 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
354 ; CHECK-NEXT: [[I0:%.*]] = extractvalue { i32, i32 } [[AGG_LEFT:%.*]], 0
356 ; CHECK-NEXT: call void @usei32(i32 [[I0]])
[all …]
H A Dxor-icmps.ll6 ; CHECK-NEXT: [[I0:%.*]] = icmp eq i4 [[X:%.*]], 0
8 ; CHECK-NEXT: [[R:%.*]] = xor i1 [[I0]], [[I1]]
19 ; CHECK-NEXT: [[I0:%.*]] = icmp ne i4 [[X:%.*]], 0
21 ; CHECK-NEXT: [[R:%.*]] = xor i1 [[I0]], [[I1]]
32 ; CHECK-NEXT: [[I0:%.*]] = icmp eq i4 [[X:%.*]], 0
34 ; CHECK-NEXT: [[R:%.*]] = xor i1 [[I0]], [[I1]]
61 ; CHECK-NEXT: [[I0:%.*]] = icmp slt i4 [[X:%.*]], 0
63 ; CHECK-NEXT: [[R:%.*]] = xor i1 [[I0]], [[I1]]
64 ; CHECK-NEXT: call void @use(i1 [[I0]])
78 ; CHECK-NEXT: [[I0:%.*]] = icmp sgt i4 [[X:%.*]], 0
[all …]
H A Dxor-of-or.ll7 ; CHECK-NEXT: [[I0:%.*]] = or i4 [[X:%.*]], [[Y:%.*]]
8 ; CHECK-NEXT: [[I1:%.*]] = xor i4 [[I0]], [[Z:%.*]]
31 ; CHECK-NEXT: [[I0:%.*]] = or i4 [[X:%.*]], -4
32 ; CHECK-NEXT: call void @use(i4 [[I0]])
33 ; CHECK-NEXT: [[I1:%.*]] = xor i4 [[I0]], -6
135 ; CHECK-NEXT: [[I0:%.*]] = or i4 [[X:%.*]], -4
136 ; CHECK-NEXT: [[I1:%.*]] = xor i4 [[I0]], ptrtoint (i32* @G2 to i4)
145 ; CHECK-NEXT: [[I0:%.*]] = or i4 [[X:%.*]], ptrtoint (i32* @G to i4)
146 ; CHECK-NEXT: [[I1:%.*]] = xor i4 [[I0]], -6
155 ; CHECK-NEXT: [[I0:%.*]] = or i4 [[X:%.*]], ptrtoint (i32* @G to i4)
[all …]
H A Dsignmask-of-sext-vs-of-shl-of-zext.ll49 ; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
50 ; CHECK-NEXT: [[I1:%.*]] = shl i32 [[I0]], 17
61 ; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
62 ; CHECK-NEXT: [[I1:%.*]] = shl nuw i32 [[I0]], 16
76 ; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
77 ; CHECK-NEXT: call void @use32(i32 [[I0]])
90 ; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
91 ; CHECK-NEXT: [[I1:%.*]] = shl nuw i32 [[I0]], 16
104 ; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
105 ; CHECK-NEXT: call void @use32(i32 [[I0]])
[all …]
H A Dsink-not-into-another-hand-of-and.ll16 ; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[I1]], [[I0:%.*]]
28 ; CHECK-NEXT: [[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
30 ; CHECK-NEXT: call void @use1(i1 [[I0]])
31 ; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[I0]], [[I1]]
48 ; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
63 ; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
82 ; CHECK-NEXT: [[I3:%.*]] = xor i1 [[I0:%.*]], true
H A Dsink-not-into-another-hand-of-or.ll16 ; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[I1]], [[I0:%.*]]
28 ; CHECK-NEXT: [[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
30 ; CHECK-NEXT: call void @use1(i1 [[I0]])
31 ; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[I0]], [[I1]]
48 ; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
63 ; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
82 ; CHECK-NEXT: [[I3:%.*]] = xor i1 [[I0:%.*]], true
/llvm-project-15.0.7/mlir/test/Dialect/SparseTensor/
H A Dconversion_sparse2dense.mlir18 // CHECK-DAG: %[[I0:.*]] = arith.constant 0 : index
29 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<1xindex>
56 // CHECK-DAG: %[[I0:.*]] = arith.constant 0 : index
67 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<1xindex>
94 // CHECK-DAG: %[[I0:.*]] = arith.constant 0 : index
109 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<2xindex>
138 // CHECK-DAG: %[[I0:.*]] = arith.constant 0 : index
153 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<2xindex>
197 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<2xindex>
241 // CHECK-DAG: memref.store %[[I0]], %[[PermS]][%[[I0]]] : memref<2xindex>
[all …]
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dinvariant_load_zext_parameter.ll4 ; void f(int *I0, int *I1, int *V) {
6 ; if ((long)(*I0) == 0)
23 ; CODEGEN-NEXT: %polly.access.I0 = getelementptr i32, i32* %I0, i64 0
24 ; CODEGEN-NEXT: %polly.access.I0.load = load i32, i32* %polly.access.I0
25 ; CODEGEN-NEXT: store i32 %polly.access.I0.load, i32* %loadI1a.preload.s2a
26 ; CODEGEN-NEXT: %0 = sext i32 %polly.access.I0.load to i64
36 define void @f(i32* %I0, i32* %I1, i32* %V) {
46 %loadI1a = load i32, i32* %I0, align 4
51 %loadI0 = load i32, i32* %I0, align 4
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dinterface.m6 @interface I0 { interface
14 static int f0(I0 *a0) {
18 static int f1(I0 *a0) {
22 static int f2(I0 *a0) {
27 I0 *a = alloca(sizeof(*a) * 4);
H A Dobjc2-retain-codegen.m4 @interface I0 { interface
5 I0 *_f0;
10 @implementation I0 implementation
/llvm-project-15.0.7/llvm/test/Transforms/Scalarizer/
H A Dvector-gep.ll20 ;CHECK: %[[I0:.i[0-9]*]] = extractelement <4 x i16*> %0, i32 0
21 ;CHECK: getelementptr i16, i16* %[[I0]], i16 1
41 ;CHECK: %[[I0:.i[0-9]*]] = extractelement <4 x i16*> %0, i32 0
48 ;CHECK: %.splat[[I0]] = extractelement <4 x i16> %.splat, i32 0
49 ;CHECK: getelementptr i16, i16* %[[I0]], i16 %.splat[[I0]]
73 ;CHECK: %.splat[[I0:.i[0-9]*]] = extractelement <4 x i16*> %.splat, i32 0
74 ;CHECK: getelementptr i16, i16* %.splat[[I0]], i16 0
95 ;CHECK: %.splat[[I0:.i[0-9]*]] = extractelement <4 x i16*> %.splat, i32 0
96 ;CHECK: getelementptr i16, i16* %.splat[[I0]], i16 0
114 ;CHECK: %[[I0:.i[0-9]*]] = extractelement <4 x i16*> %0, i32 0
[all …]
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DGVNSink.cpp723 Instruction *I0 = NewInsts[0]; in analyzeInstructionForSinking() local
745 if ((isa<CallInst>(I0) || isa<InvokeInst>(I0)) && OpNum == E - 1 && in analyzeInstructionForSinking()
840 Instruction *I0 = Insts.front(); in sinkLastInstruction() local
853 auto *Op = I0->getOperand(O); in sinkLastInstruction()
865 I0->getOperandUse(O).set(NewOperands[O]); in sinkLastInstruction()
870 if (I != I0) { in sinkLastInstruction()
871 combineMetadataForCSE(I0, I, true); in sinkLastInstruction()
872 I0->andIRFlags(I); in sinkLastInstruction()
876 if (I != I0) in sinkLastInstruction()
877 I->replaceAllUsesWith(I0); in sinkLastInstruction()
[all …]
/llvm-project-15.0.7/libcxx/test/std/utilities/meta/meta.rel/
H A Dis_base_of_union.pass.cpp44 struct I0;
58 test_is_not_base_of<U0, I0>(); in main()
63 test_is_not_base_of<I0, int>(); in main()
75 test_is_not_base_of<I0, U0>(); in main()
80 test_is_not_base_of<int, I0>(); in main()
/llvm-project-15.0.7/llvm/unittests/IR/
H A DUserTest.cpp135 Instruction& I0 = *(entryBB.begin()); in TEST() local
141 EXPECT_EQ(I0.user_begin() ,I0.user_end()); in TEST()
147 EXPECT_TRUE(XUser->replaceUsesOfWith(&X, &I0)); in TEST()
149 EXPECT_NE(I0.user_begin(), I0.user_end()); in TEST()
152 EXPECT_FALSE(XUser->replaceUsesOfWith(&X, &I0)); in TEST()
H A DValueTest.cpp136 Instruction *I0 = &*BB.begin(); in TEST() local
137 ASSERT_TRUE(I0); in TEST()
163 CHECK_PRINT(I0, " %0 = add i32 %y, 1"); in TEST()
182 CHECK_PRINT_AS_OPERAND(I0, false, "%0"); in TEST()
184 CHECK_PRINT_AS_OPERAND(I0, true, "i32 %0"); in TEST()
213 Instruction *I0 = &*EntryBB.begin(); in TEST() local
214 ASSERT_TRUE(I0); in TEST()
220 EXPECT_EQ(MST.getLocalSlot(I0), 0); in TEST()
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dphi-cse.ll18 ; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
20 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
51 ; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
53 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
86 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
117 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
148 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
209 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
241 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
276 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/EarlyCSE/
H A Dphi.ll15 ; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
17 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
48 ; CHECK-NEXT: [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
50 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
83 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
114 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
145 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
206 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
238 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
273 ; CHECK-NEXT: store i32 [[I0]], ptr [[D0:%.*]], align 4
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/
H A Dtrunc_assume.ll8 ; CHECK-NEXT: [[I0:%.*]] = shl i16 [[X:%.*]], [[Y]]
9 ; CHECK-NEXT: ret i16 [[I0]]
28 ; CHECK-NEXT: [[I0:%.*]] = lshr i16 [[X]], [[Y]]
29 ; CHECK-NEXT: ret i16 [[I0]]
52 ; CHECK-NEXT: [[I0:%.*]] = ashr i16 [[X]], [[Y]]
53 ; CHECK-NEXT: ret i16 [[I0]]
/llvm-project-15.0.7/mlir/test/Dialect/SCF/
H A Dloop-range.mlir22 // CHECK: %[[I0:.*]] = arith.addi %[[ARG2]], %[[C0]] : index
26 // CHECK: scf.for %[[I:.*]] = %[[I0]] to %[[I2]] step %[[I3]] {
55 // CHECK: %[[I0:.*]] = arith.addi %[[ARG2]], %[[C0]] : index
59 // CHECK: scf.for %[[I:.*]] = %[[I0]] to %[[I2]] step %[[I3]] {
87 // CHECK: %[[I0:.*]] = arith.addi %[[ARG2]], %[[C0]] : index
89 // CHECK: scf.for %[[J:.*]] = %[[I0]] to %[[I1]] step %[[C1]] {
121 // CHECK: %[[I0:.*]] = arith.addi %[[ARG2]], %[[C0]] : index
123 // CHECK: scf.for %[[I:.*]] = %[[I0]] to %[[I1]] step %[[C1]] {

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