| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | CodeGenHwModes.h | 28 struct HwMode { struct
29 HwMode(Record *R);
48 const HwMode &getMode(unsigned Id) const { in getMode() argument
59 std::vector<HwMode> Modes;
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| H A D | CodeGenHwModes.cpp | 21 HwMode::HwMode(Record *R) { in HwMode() function in HwMode
27 void HwMode::dump() const { in dump()
96 for (const HwMode &M : Modes) { in dump()
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| H A D | VarLenCodeEmitterGen.cpp | 75 CodeGenTarget &Target, int HwMode = -1);
233 for (unsigned HwMode : HwModes) in run() local
234 emitInstructionBaseValues(OS, NumberedInstructions, Target, (int)HwMode); in run()
321 CodeGenTarget &Target, int HwMode) { in emitInstructionBaseValues() argument
326 if (HwMode == -1) { in emitInstructionBaseValues()
330 StringRef Name = HWM.getMode(HwMode).Name; in emitInstructionBaseValues()
349 if (EBM.hasMode(HwMode)) in emitInstructionBaseValues()
350 EncodingDef = EBM.get(HwMode); in emitInstructionBaseValues()
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| H A D | CodeEmitterGen.cpp | 61 CodeGenTarget &Target, int HwMode = -1);
343 CodeGenTarget &Target, int HwMode) { in emitInstructionBaseValues() argument
345 if (HwMode == -1) in emitInstructionBaseValues()
348 o << " static const uint64_t InstBits_" << HWM.getMode(HwMode).Name in emitInstructionBaseValues()
364 if (EBM.hasMode(HwMode)) in emitInstructionBaseValues()
365 EncodingDef = EBM.get(HwMode); in emitInstructionBaseValues()
444 for (unsigned HwMode : HwModes) in run() local
445 emitInstructionBaseValues(o, NumberedInstructions, Target, (int)HwMode); in run()
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| H A D | SubtargetEmitter.cpp | 1713 const HwMode &HM = CGH.getMode(M); in EmitHwModeCheck()
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| H A D | CodeGenDAGPatterns.cpp | 4453 const HwMode &HM = CGH.getMode(M); in ExpandHwModeBasedTypes()
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | HwModeEncodeDecode.td | 16 def ModeA : HwMode<"+a">;
17 def ModeB : HwMode<"+b">;
88 // ENCODER: switch (HwMode) {
89 // ENCODER: default: llvm_unreachable("Unhandled HwMode");
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| H A D | HwModeSelect.td | 21 def TestMode1 : HwMode<"+feat1">;
22 def TestMode2 : HwMode<"+feat2">;
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchRegisterInfo.cpp | 30 LoongArchRegisterInfo::LoongArchRegisterInfo(unsigned HwMode) in LoongArchRegisterInfo() argument
33 /*PC*/ 0, HwMode) {} in LoongArchRegisterInfo()
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| H A D | LoongArchRegisterInfo.h | 26 LoongArchRegisterInfo(unsigned HwMode);
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| H A D | LoongArch.td | 30 def LA64 : HwMode<"+64bit">;
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.h | 25 RISCVRegisterInfo(unsigned HwMode);
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| H A D | RISCVRegisterInfo.cpp | 46 RISCVRegisterInfo::RISCVRegisterInfo(unsigned HwMode) in RISCVRegisterInfo() argument
48 /*PC*/0, HwMode) {} in RISCVRegisterInfo()
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| H A D | RISCV.td | 447 def RV64 : HwMode<"+64bit">;
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.h | 31 HexagonRegisterInfo(unsigned HwMode);
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| H A D | HexagonRegisterInfo.cpp | 56 HexagonRegisterInfo::HexagonRegisterInfo(unsigned HwMode) in HexagonRegisterInfo() argument
58 0/*PC*/, HwMode) {} in HexagonRegisterInfo()
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| H A D | Hexagon.td | 151 def Hvx64: HwMode<"+hvx-length64b">;
152 def Hvx128: HwMode<"+hvx-length128b">;
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 251 unsigned HwMode; variable
733 return RCInfos[getNumRegClasses() * HwMode + RC.getID()]; in getRegClassInfo()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | Target.td | 21 class HwMode<string FS> {
34 def DefaultMode : HwMode<"">;
41 class HwModeSelect<list<HwMode> Ms> {
42 list<HwMode> Modes = Ms;
50 class ValueTypeByHwMode<list<HwMode> Ms, list<ValueType> Ts>
65 class RegInfoByHwMode<list<HwMode> Ms = [], list<RegInfo> Ts = []>
476 // Allows specifying an InstructionEncoding by HwMode. If an Instruction specifies
478 // to encode and decode based on HwMode.
479 class EncodingByHwMode<list<HwMode> Ms = [], list<InstructionEncoding> Ts = []>
496 // Allows specifying a canonical InstructionEncoding by HwMode. If non-empty,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 64 RCInfos(RCIs), HwMode(Mode) { in TargetRegisterInfo()
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