Searched refs:HiR (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 789 Register HiR = P.second; in splitShift() local
854 BuildMI(B, MI, DL, TII->get(ShiftOpc), HiR) in splitShift()
871 BuildMI(B, MI, DL, TII->get(S2_asr_i_r), HiR) in splitShift()
877 BuildMI(B, MI, DL, TII->get(A2_aslh), HiR) in splitShift()
888 BuildMI(B, MI, DL, TII->get(S2_asr_i_r), HiR) in splitShift()
914 unsigned HiR = P.second; in splitAslOr() local
944 BuildMI(B, MI, DL, TII->get(A2_or), HiR) in splitAslOr()
961 BuildMI(B, MI, DL, TII->get(S2_asl_i_r_or), HiR) in splitAslOr()
972 BuildMI(B, MI, DL, TII->get(A2_or), HiR) in splitAslOr()
983 BuildMI(B, MI, DL, TII->get(S2_asl_i_r_or), HiR) in splitAslOr()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30177 SDValue HiR = DAG.getBitcast(VT16, getUnpackh(DAG, dl, VT, R, R)); in LowerShift() local
30179 HiR = DAG.getNode(X86OpcI, dl, VT16, HiR, Cst8); in LowerShift()
30181 HiR = DAG.getNode(ISD::MUL, dl, VT16, HiR, HiA); in LowerShift()
30183 HiR = DAG.getNode(X86ISD::VSRLI, dl, VT16, HiR, Cst8); in LowerShift()
30184 return DAG.getNode(X86ISD::PACKUS, dl, VT, LoR, HiR); in LowerShift()
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