Searched refs:HiPtr (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 1324 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, LdNode->getBasePtr(), in lowerLoadF128() local
1327 DAG.getLoad(MVT::f64, DL, LdNode->getChain(), HiPtr, in lowerLoadF128()
1465 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, StNode->getBasePtr(), in lowerStoreF128() local
1468 DAG.getStore(StNode->getChain(), DL, SDValue(Hi64, 0), HiPtr, in lowerStoreF128()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1469 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, TypeSize::Fixed(Size)); in SplitVectorLoad() local
1472 HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()), in SplitVectorLoad()
1552 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize()); in SplitVectorStore() local
1563 DAG.getTruncStore(Chain, SL, Hi, HiPtr, SrcValue.getWithOffset(Size), in SplitVectorStore()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2362 SDValue HiPtr = DAG.getMemBasePlusOffset(StackSlot, TypeSize::Fixed(4), dl); in ExpandLegalINT_TO_FP() local
2364 DAG.getStore(MemChain, dl, Hi, HiPtr, MachinePointerInfo()); in ExpandLegalINT_TO_FP()
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