Searched refs:HexagonInstr (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonShuffler.h | 98 class HexagonInstr {
107 HexagonInstr(MCInstrInfo const &MCII, in HexagonInstr() function
116 bool operator<(const HexagonInstr &B) const {
121 static bool lessCore(const HexagonInstr &A, const HexagonInstr &B) { in lessCore()
126 static bool lessCVI(const HexagonInstr &A, const HexagonInstr &B) { in lessCVI()
134 SmallVector<HexagonInstr, HEXAGON_PRESHUFFLE_PACKET_SIZE>;
151 Optional<HexagonInstr *> PrefSlot3Inst;
154 SmallVector<HexagonInstr *, HEXAGON_PRESHUFFLE_PACKET_SIZE> branchInsts;
226 return llvm::any_of(insts(), [&](HexagonInstr const &I) { in HasInstWith()
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| H A D | HexagonShuffler.cpp | 183 HexagonInstr PI(MCII, STI, &ID, Extender, S); in append()
197 for (HexagonInstr &ISJ : insts()) { in restrictSlot1AOK()
229 for (HexagonInstr &ISJ : insts()) { in restrictNoSlot1Store()
311 for (HexagonInstr &ISJ : insts()) { in permitNonSlot()
327 llvm::stable_sort(*ShuffledPacket, HexagonInstr::lessCVI); in ValidResourceUsage()
408 llvm::none_of(insts(), [&](HexagonInstr const &I) { in restrictStoreLoadOrder()
597 HexagonInstr *PrefSlot3Inst = *Summary.PrefSlot3Inst; in restrictPreferSlot3()
630 llvm::stable_sort(PacketResult, HexagonInstr::lessCore); in tryAuction()
640 for (HexagonInstr const &ISJ : insts(PacketResult)) in tryAuction()
689 for (HexagonInstr const &ISJ : insts()) { in shuffle()
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