Home
last modified time | relevance | path

Searched refs:GRLenVT (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp34 MVT GRLenVT = Subtarget->getGRLenVT(); in Select() local
43 if (Imm == 0 && VT == GRLenVT) { in Select()
45 LoongArch::R0, GRLenVT); in Select()
50 SDValue SrcReg = CurDAG->getRegister(LoongArch::R0, GRLenVT); in Select()
53 SDValue SDImm = CurDAG->getTargetConstant(Inst.Imm, DL, GRLenVT); in Select()
55 Result = CurDAG->getMachineNode(LoongArch::LU12I_W, DL, GRLenVT, SDImm); in Select()
57 Result = CurDAG->getMachineNode(Inst.Opc, DL, GRLenVT, SrcReg, SDImm); in Select()
65 SDValue Imm = CurDAG->getTargetConstant(0, DL, GRLenVT); in Select()
H A DLoongArchISelLowering.cpp39 MVT GRLenVT = Subtarget.getGRLenVT(); in LoongArchTargetLowering() local
41 addRegisterClass(GRLenVT, &LoongArch::GPRRegClass); in LoongArchTargetLowering()
51 setOperationAction(ISD::SHL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
52 setOperationAction(ISD::SRA_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
53 setOperationAction(ISD::SRL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
54 setOperationAction(ISD::FP_TO_SINT, GRLenVT, Custom); in LoongArchTargetLowering()
82 setOperationAction(ISD::BR_CC, GRLenVT, Expand); in LoongArchTargetLowering()
417 MVT GRLenVT = Subtarget.getGRLenVT(); in performANDCombine() local
481 MVT GRLenVT = Subtarget.getGRLenVT(); in performSRLCombine() local
509 MVT GRLenVT = Subtarget.getGRLenVT(); in performORCombine() local
[all …]
H A DLoongArchInstrInfo.td78 def uimm2 : Operand<GRLenVT> {
88 def uimm3 : Operand<GRLenVT> {
92 def uimm5 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isUInt<5>(Imm);}]> {
96 def uimm6 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isUInt<6>(Imm);}]> {
100 def uimm8 : Operand<GRLenVT> {
104 def uimm12 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isUInt<12>(Imm);}]> {
108 def uimm14 : Operand<GRLenVT> {
112 def uimm15 : Operand<GRLenVT> {
116 def simm12 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isInt<12>(Imm);}]> {
127 def simm16 : Operand<GRLenVT> {
[all …]
H A DLoongArchSubtarget.h42 MVT GRLenVT = MVT::i32; variable
83 MVT getGRLenVT() const { return GRLenVT; } in getGRLenVT()
H A DLoongArchRegisterInfo.td77 def GRLenVT : ValueTypeByHwMode<[LA32, LA64],
85 def GPR : RegisterClass<"LoongArch", [GRLenVT], 32, (add
151 def CFR : RegisterClass<"LoongArch", [GRLenVT], 32, (sequence "FCC%u", 0, 7)> {
H A DLoongArchSubtarget.cpp38 GRLenVT = MVT::i64; in initializeSubtargetDependencies()
H A DLoongArchFloat32InstrInfo.td181 : Pat<(select (GRLenVT (setcc RegTy:$a, RegTy:$b, cc)), RegTy:$t, RegTy:$f),