Home
last modified time | relevance | path

Searched refs:GPUs (Results 1 – 25 of 40) sorted by relevance

12

/llvm-project-15.0.7/clang/tools/amdgpu-arch/
H A DAMDGPUArch.cpp45 std::vector<std::string> *GPUs = in iterateAgentsCallback() local
52 GPUs->push_back(GPUName); in iterateAgentsCallback()
62 std::vector<std::string> GPUs; in main() local
63 Status = hsa_iterate_agents(iterateAgentsCallback, &GPUs); in main()
68 for (const auto &GPU : GPUs) in main()
71 if (GPUs.size() < 1) in main()
/llvm-project-15.0.7/clang/test/Driver/
H A Dhip-output-file-name.hip25 // Output bundled PPE for two GPUs for mixed compilation.
30 // Output bundled PPE for two GPUs for mixed compilation with -save-temps.
35 // Output unbundled PPE for two GPUs for device only compilation.
40 // Output bundled PPE for two GPUs for device only compilation with --gpu-bundle-output.
45 // Output unbundled PPE for two GPUs for device only compilation with --no-gpu-bundle-output.
62 // Output bundled PPE for two GPUs for mixed compilation.
67 // Output bundled PPE for two GPUs for mixed compilation.
72 // Output bundled PPE for two GPUs for device only compilation with --gpu-bundle-output.
77 // Output unbundled PPE for two GPUs for device only compilation.
H A Damdgpu-mcpu.cl1 // Check that -mcpu works for all supported GPUs.
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR700Instructions.td10 // - Available to R700 and newer VLIW4/VLIW5 GPUs
11 // - Available only on R700 family GPUs.
H A DAMDGPUCallingConv.td1 //===---- AMDCallingConv.td - Calling Conventions for Radeon GPUs ---------===//
9 // This describes the calling conventions for the AMD Radeon GPUs.
H A DCaymanInstructions.td10 // family GPUs.
H A DEvergreenInstructions.td10 // - Available to Evergreen and newer VLIW4/VLIW5 GPUs
11 // - Available only on Evergreen family GPUs.
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dr600-encoding.ll4 ; The earliest R600 GPUs have a slightly different encoding than the rest of
5 ; the VLIW4/5 GPUs.
H A Dlocal-memory.r600.ll47 ; this consistently on evergreen GPUs.
H A Dmad_int24.ll7 ; Signed 24-bit multiply is not supported on pre-Cayman GPUs.
H A D32-bit-local-address-space.ll4 ; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and
H A Dmul_int24.ll8 ; Signed 24-bit multiply is not supported on pre-Cayman GPUs.
/llvm-project-15.0.7/mlir/include/mlir/Dialect/AMDGPU/
H A DAMDGPU.td52 available on AMD GPUs, including extensions in newer GPUs.
105 intrinsics available on AMD GPUs, including extensions in newer GPUs.
144 of AMD GPUs.
/llvm-project-15.0.7/llvm/docs/
H A DAMDGPUOperandSyntax.rst430 .. WARNING:: GFX7 does not support *xnack* feature. For availability of this feature in other GPUs,…
636 0.0 The same as integer constant 0. All GPUs
637 0.5 Floating-point constant 0.5 All GPUs
638 1.0 Floating-point constant 1.0 All GPUs
639 2.0 Floating-point constant 2.0 All GPUs
640 4.0 Floating-point constant 4.0 All GPUs
641 -0.5 Floating-point constant -0.5 All GPUs
642 -1.0 Floating-point constant -1.0 All GPUs
643 -2.0 Floating-point constant -2.0 All GPUs
644 -4.0 Floating-point constant -4.0 All GPUs
H A DCompileCudaWithLLVM.rst89 forwards-compatible with e.g. ``sm_35`` GPUs.
100 If you're using GPUs, you probably care about making numerical code run fast.
502 Modern CPUs and GPUs are architecturally quite different, so code that's fast
527 64-bit integer divides are much slower than 32-bit ones on NVIDIA GPUs.
533 function inlining need to be more aggressive for GPUs than for CPUs because
/llvm-project-15.0.7/openmp/docs/remarks/
H A DOMP100.rst12 To facilitate OpenMP semantics on GPUs we provide a runtime mechanism through
/llvm-project-15.0.7/mlir/docs/Dialects/
H A DGPU.md10 for GPUs). Its goal is to abstract away device- and driver-specific
/llvm-project-15.0.7/clang/include/clang/Config/
H A Dconfig.h.cmake50 /* Default architecture for OpenMP offloading to Nvidia GPUs. */
/llvm-project-15.0.7/mlir/test/Integration/GPU/CUDA/TensorCore/
H A Dwmma-matmul-f16.mlir10 // Test case to check the working of Tensor cores on Nvidia GPUs. The kernel has already
/llvm-project-15.0.7/openmp/docs/
H A DSupportAndFAQ.rst80 available GPUs failed, you should also set:
216 Q: Does Clang support `<math.h>` and `<complex.h>` operations in OpenMP target on GPUs?
220 target regions that are compiled for GPUs.
/llvm-project-15.0.7/openmp/docs/optimizations/
H A DOpenMPOpt.rst108 - 2019 EuroLLVM Developers’ Meeting: "Compiler Optimizations for (OpenMP) Target Offloading to GPUs…
/llvm-project-15.0.7/clang/docs/
H A DHLSLSupport.rst128 parallel nature of GPUs in a hardware abstracted language.
132 example, register spilling is often excessively expensive on GPUs, so HLSL
/llvm-project-15.0.7/openmp/libomptarget/cmake/Modules/
H A DLibomptargetGetDependencies.cmake17 # CUDA : required to control offloading to NVIDIA GPUs.
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Tosa/IR/
H A DTosaOpBase.td37 be deployed on a wide range of different processors, such as CPUs or GPUs,
/llvm-project-15.0.7/clang/
H A DCMakeLists.txt334 "Default architecture for OpenMP offloading to Nvidia GPUs." FORCE)
335 message(WARNING "Resetting default architecture for OpenMP offloading to Nvidia GPUs to sm_35")
338 "Default architecture for OpenMP offloading to Nvidia GPUs.")

12