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Searched refs:GIM_CheckOpcode (Results 1 – 25 of 26) sorted by relevance

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/llvm-project-15.0.7/llvm/test/TableGen/
H A DGlobalISelEmitter-immarg-literal-pattern.td25 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
34 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
45 // GISEL: GIM_CheckOpcode, /*MI*/0, MyTarget::G_TGT_CAT,
54 // GISEL: GIM_CheckOpcode, /*MI*/0, MyTarget::G_TGT_CAT,
H A Dpredicate-patfags.td47 // GISEL: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
51 // GISEL: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
55 // GISEL: GIM_CheckOpcode, /*MI*/1, MyTarget::G_TGT_MUL24,
58 // GISEL: GIM_CheckOpcode, /*MI*/1, MyTarget::G_TGT_MUL24,
H A DDefaultOpsGlobalISel.td34 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMAXNUM,
47 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FFLOOR,
57 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FCANONICALIZE,
68 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FCOS,
77 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FEXP2,
95 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSIN,
104 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSQRT,
113 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_ROUND,
121 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_TRUNC,
H A Daddress-space-patfrags.td62 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD,
82 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD,
101 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
114 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
124 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
H A DGlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td10 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SELECT,
19 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ICMP,
27 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SUB,
47 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ICMP,
55 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SUB,
H A DGlobalISelEmitter-setcc.td9 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FCMP,
16 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ICMP,
H A DGlobalISelEmitter-SDNodeXForm-timm.td21 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
30 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
H A DGlobalISelEmitter.td253 // R19N-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SELECT,
268 // R19C-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SELECT,
403 // R20N-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SUB,
468 // R00N-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SUB,
476 // R00C-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
492 // R00C-NEXT: GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SUB,
597 // R02N-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
630 // NOOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
659 // NOOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
689 // NOOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
[all …]
H A DGlobalISelEmitterCustomPredicate.td74 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
86 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
104 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
112 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
151 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SUB,
159 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
H A DGlobalISelEmitter-immAllZeroOne.td25 // GISEL-NOOPT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
40 // GISEL-NOOPT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SHL,
H A Dgisel-physreg-input.td29 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
57 // GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_MUL,
H A DContextlessPredicates.td27 // CHECK_NOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
55 // CHECK_OPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
H A DGlobalISelEmitterRegSequence.td34 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SEXT,
67 // CHECK: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ZEXT,
H A Dimmarg-predicated.td10 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
H A DGlobalISelEmitter-atomic_store.td11 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
H A Dimmarg.td11 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
H A DGlobalISelEmitter-output-discard.td10 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
H A DGlobalISelEmitter-input-discard.td11 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
H A DHasNoUse.td19 // GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_ADD,
H A DGlobalISelEmitter-zero-reg.td24 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD,
H A DGlobalISelEmitter-nested-subregs.td34 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ANYEXT,
H A DGlobalISelEmitterVariadic.td26 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_BUILD_VECTOR,
H A DGlobalISelEmitterSubreg.td144 // CHECK-LABEL: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITREVERSE,
163 // CHECK-LABEL: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CTPOP,
H A DGlobalISelEmitterMatchTableOptimizer.td56 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DInstructionSelector.h119 GIM_CheckOpcode, enumerator

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