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/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstrAliases.td138 // t<cond> %icc, rs => t<cond> %icc, G0 + rs
148 // t<cond> %xcc, rs => t<cond> %xcc, G0 + rs
158 // t<cond> rs=> t<cond> %icc, G0 + rs2
168 // t<cond> %icc, imm => t<cond> %icc, G0 + imm
176 // t<cond> %xcc, imm => t<cond> %xcc, G0 + imm
185 // t<cond> imm => t<cond> G0 + imm
193 // t<cond> rs1 => t<cond> G0 + rs1
354 def : InstAlias<"tst $rs2", (ORCCrr G0, IntRegs:$rs2, G0)>;
363 def : InstAlias<"restore", (RESTORErr G0, G0, G0)>;
366 def : InstAlias<"save", (SAVErr G0, G0, G0)>;
[all …]
H A DDelaySlotFiller.cpp420 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR()
421 && OrMI->getOperand(2).getReg() != SP::G0) in combineRestoreOR()
425 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR()
473 RestoreMI->getOperand(1).setReg(SP::G0); in combineRestoreSETHIi()
492 && MBBI->getOperand(0).getReg() == SP::G0 in tryCombineRestoreWithPrevInst()
493 && MBBI->getOperand(1).getReg() == SP::G0 in tryCombineRestoreWithPrevInst()
494 && MBBI->getOperand(2).getReg() == SP::G0); in tryCombineRestoreWithPrevInst()
H A DSparcFrameLowering.cpp225 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0) in emitEpilogue()
226 .addReg(SP::G0); in emitEpilogue()
239 .addReg(SP::G0) in emitEpilogue()
242 .addReg(SP::G0) in emitEpilogue()
H A DSparcInstr64Bit.td67 def : Pat<(i64 simm13:$val), (ORri (i64 G0), (as_i32imm $val))>;
298 def : Pat<(store (i64 0), ADDRrr:$dst), (STXrr ADDRrr:$dst, (i64 G0))>;
299 def : Pat<(store (i64 0), ADDRri:$dst), (STXri ADDRri:$dst, (i64 G0))>;
526 def : Pat<(SPlo tglobaladdr:$in), (ORXri (i64 G0), tglobaladdr:$in)>;
528 def : Pat<(SPlo tconstpool:$in), (ORXri (i64 G0), tconstpool:$in)>;
532 def : Pat<(SPlo tglobaltlsaddr:$in), (ORXri (i64 G0), tglobaltlsaddr:$in)>;
540 def : Pat<(SPlo tblockaddress:$in), (ORXri (i64 G0), tblockaddress:$in)>;
H A DSparcInstrInfo.cpp322 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg()
362 .addReg(SP::G0) in copyPhysReg()
384 MIB.addReg(SP::G0); in copyPhysReg()
H A DSparcRegisterInfo.td129 def G0 : Ri< 0, "G0">, DwarfRegNum<[0]>;
286 def G0_G1 : Rdi<0, "G0", [G0, G1]>;
H A DSparcISelDAGToDAG.cpp140 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
356 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
H A DSparcRegisterInfo.cpp73 Reserved.set(SP::G0); in getReservedRegs()
H A DSparcInstrInfo.td1182 // to construct a MEMrr with fixed G0 registers.
1748 (ORrr (i32 G0), (i32 G0))>;
1751 (ORri (i32 G0), imm:$val)>;
1761 def : Pat<(SPlo tglobaladdr:$in), (ORri (i32 G0), tglobaladdr:$in)>;
1763 def : Pat<(SPlo tconstpool:$in), (ORri (i32 G0), tconstpool:$in)>;
1767 def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i32 G0), tglobaltlsaddr:$in)>;
1775 def : Pat<(SPlo tblockaddress:$in), (ORri (i32 G0), tblockaddress:$in)>;
1803 def : Pat<(store (i32 0), ADDRrr:$dst), (STrr ADDRrr:$dst, (i32 G0))>;
1804 def : Pat<(store (i32 0), ADDRri:$dst), (STri ADDRri:$dst, (i32 G0))>;
/llvm-project-15.0.7/flang/test/Semantics/
H A Dio07.f9075 8001 format(9G0.5)
78 8101 format(9(G0.5e1))
81 8102 format(9(G0.5 E 1))
/llvm-project-15.0.7/llvm/test/Transforms/Internalize/
H A Dexternally-initialized.ll4 ; CHECK: @G0
7 @G0 = protected externally_initialized global i32 0, align 4
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dforeach-multiclass.td60 // CHECK: def G0
135 def G0 : G;
137 foreach g = [G0] in
/llvm-project-15.0.7/lld/test/MachO/
H A Dicf-scale.s20 # CHECK-DAG: [[#%x,G0:]] g F __TEXT,__text _g000000
21 # CHECK-DAG: [[#%x,G0]] g F __TEXT,__text _g033333
31 # CHECK-DAG: [[#%x,G0]] <_g033333>:
/llvm-project-15.0.7/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp68 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr()
156 if (Op1.isReg() && Op1.getReg() != SP::G0) { in printMemOperand()
164 PrintedFirstOperand && ((Op2.isReg() && Op2.getReg() == SP::G0) || in printMemOperand()
/llvm-project-15.0.7/llvm/test/Transforms/GlobalOpt/
H A Dinalloca-varargs.ll9 ; CHECK-NEXT: [[G0:%.*]] = getelementptr inbounds <{ ptr, i32 }>, ptr [[ARGMEM]], i32 0, i32 1
10 ; CHECK-NEXT: store i32 5, ptr [[G0]], align 4
H A Dmemset.ll7 @G0 = internal global [58 x i8] c"asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd\00" …
14 …call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @G0, i32 0, i32 …
/llvm-project-15.0.7/lld/test/ELF/
H A Daarch64-movw-tprel.s14 ## offset from the thread pointer TP. The G0, G1 and G2 refer to partitions
15 ## of the result with G2 bits [47:32], G1 bits [31:16] and G0 bits [15:0]
H A Dmips-tls-64-pic-local-variable.s29 # -fpic -O -G0 -EB -mabi=n64 -msoft-float -std=gnu99 -S %s -o %t.s
/llvm-project-15.0.7/llvm/unittests/IR/
H A DValueTest.cpp141 GlobalVariable *G0 = M->getGlobalVariable("g0"); in TEST() local
142 ASSERT_TRUE(G0); in TEST()
186 CHECK_PRINT_AS_OPERAND(G0, true, "ptr @g0"); in TEST()
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dfloat-const64-G0.ll3 ; Check that no CONST64's are emitted for a -G0, mv5 compile
/llvm-project-15.0.7/llvm/unittests/Transforms/Utils/
H A DValueMapperTest.cpp70 std::unique_ptr<GlobalVariable> G0 = std::make_unique<GlobalVariable>( in TEST() local
80 Metadata *Ops1[] = {T0.get(), ConstantAsMetadata::get(G0.get())}; in TEST()
96 VM[G0.get()] = G1.get(); in TEST()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp144 Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3,
475 if (Reg >= Sparc::G0 && Reg <= Sparc::G7) in MorphToIntPairReg()
476 regIdx = Reg - Sparc::G0; in MorphToIntPairReg()
551 Op->Mem.OffsetReg = Sparc::G0; // always 0 in CreateMEMr()
602 MCOperand PrevReg = MCOperand::createReg(Sparc::G0); in expandSET()
802 Operands.push_back(SparcOperand::MorphToMEMri(Sparc::G0, std::move(LHS))); in parseMEMOperand()
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dconsecutive-ptr-uniforms.ll53 ; CHECK: %[[G0:.+]] = getelementptr i32, i32* %a, i64 -3
54 ; CHECK: getelementptr i32, i32* %[[G0]], i64 %offset.idx
166 ; INTER: %[[G0:.+]] = getelementptr inbounds %pair, %pair* %p, i64 %offset.idx, i32 0
167 ; INTER: getelementptr inbounds i32, i32* %[[G0]], i64 -6
205 ; INTER: %[[G0:.+]] = getelementptr inbounds %pair, %pair* %p, i64 %index, i32 0
206 ; INTER: %[[B0:.+]] = bitcast i32* %[[G0]] to <8 x i32>*
/llvm-project-15.0.7/llvm/test/Transforms/Attributor/
H A Dvalue-simplify.ll647 ; IS__TUNIT_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
648 ; IS__TUNIT_OPM-NEXT: store i8* null, i8** [[G0]], align 8
657 ; IS__TUNIT_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32…
658 ; IS__TUNIT_NPM-NEXT: store i8* null, i8** [[G0]], align 8
664 ; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
665 ; IS__CGSCC_OPM-NEXT: store i8* null, i8** [[G0]], align 8
674 ; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32…
675 ; IS__CGSCC_NPM-NEXT: store i8* null, i8** [[G0]], align 8
720 ; IS________OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
721 ; IS________OPM-NEXT: [[L:%.*]] = load i8*, i8** [[G0]], align 8
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dopaque-ptr.ll12 ; CHECK-NEXT: [[G0:%.*]] = getelementptr inbounds i32, ptr [[R:%.*]], i64 [[TMP4]]

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