| /llvm-project-15.0.7/libc/test/src/math/ |
| H A D | FmaTest.h | 79 ASSERT_MPFR_MATCH_ALL_ROUNDING(mpfr::Operation::Fma, input, func(x, y, z), in test_subnormal_range() 93 ASSERT_MPFR_MATCH_ALL_ROUNDING(mpfr::Operation::Fma, input, func(x, y, z), in test_normal_range()
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| H A D | fma_test.cpp | 272 ASSERT_MPFR_MATCH_ALL_ROUNDING(mpfr::Operation::Fma, input, in test_more_values()
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| /llvm-project-15.0.7/mlir/test/Target/SPIRV/ |
| H A D | gl-ops.mlir | 74 // CHECK: spv.GL.Fma {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : f32 75 %13 = spv.GL.Fma %arg0, %arg1, %arg2 : f32
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| /llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/ |
| H A D | gl-ops.mlir | 370 // spv.GL.Fma 374 // CHECK: spv.GL.Fma {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : f32 375 %2 = spv.GL.Fma %a, %b, %c : f32 382 // CHECK: spv.GL.Fma {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<3xf32> 383 %2 = spv.GL.Fma %a, %b, %c : vector<3xf32>
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| /llvm-project-15.0.7/mlir/test/Conversion/MathToSPIRV/ |
| H A D | math-to-gl-spirv.mlir | 69 // CHECK: spv.GL.Fma %{{.*}}: f32 77 // CHECK: spv.GL.Fma %{{.*}}: vector<4xf32>
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| /llvm-project-15.0.7/mlir/test/Conversion/VectorToSPIRV/ |
| H A D | vector-to-spirv.mlir | 166 // CHECK: spv.GL.Fma %[[A]], %[[B]], %[[C]] : vector<4xf32> 175 // CHECK: spv.GL.Fma %{{.+}} : f32
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/ |
| H A D | SPIRVGLOps.td | 1040 def SPV_GLFmaOp : SPV_GLTernaryArithmeticOp<"Fma", 50, SPV_Float> { 1066 fma-op ::= ssa-id `=` `spv.GL.Fma` ssa-use, ssa-use, ssa-use `:` 1072 %0 = spv.GL.Fma %a, %b, %c : f32 1073 %1 = spv.GL.Fma %a, %b, %c : vector<3xf16>
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| /llvm-project-15.0.7/libc/utils/MPFRWrapper/ |
| H A D | MPFRUtils.h | 75 Fma, enumerator
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| H A D | MPFRUtils.cpp | 577 case Operation::Fma: in ternary_operation_one_output()
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.def | 300 // Fma
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2562 SDValue Fma = DAG.getNode(ISD::FMA, SL, SrcVT, FloorMul, K1, Trunc); in LowerFP_TO_INT64() local 2567 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP_TO_INT64()
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| H A D | AMDGPULegalizerInfo.cpp | 2295 auto Fma = B.buildFMA(SrcLT, FloorMul, K1, Trunc, Flags); in legalizeFPTOI() local 2299 auto Lo = B.buildFPTOUI(S32, Fma); in legalizeFPTOI()
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 858 // Fma
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXIntrinsics.td | 937 // Fma
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