Searched refs:Flat (Results 1 – 16 of 16) sorted by relevance
| /llvm-project-15.0.7/clang-tools-extra/clangd/index/ |
| H A D | Ref.cpp | 46 std::vector<std::pair<SymbolID, const Ref *>> Flat; in build() local 47 Flat.reserve(Entries.size()); in build() 49 Flat.emplace_back(E.Symbol, &E.Reference); in build() 51 llvm::sort(Flat, llvm::less_first()); in build() 54 for (auto I = Flat.begin(), End = Flat.end(); I != End;) { in build()
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| /llvm-project-15.0.7/llvm/tools/dsymutil/ |
| H A D | dsymutil.cpp | 102 bool Flat = false; member 184 if (!Options.Flat && Options.OutputFile == "-") in verifyOptions() 189 if (Options.InputFiles.size() > 1 && Options.Flat && in verifyOptions() 281 Options.Flat = Args.hasArg(OPT_flat); in getOptions() 513 if (Options.Flat) { in getOutputFileName()
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | flat-error-unsupported-gpu-hsa.ll | 7 ; Flat instructions should not select if the target device doesn't
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/Vector/Transforms/ |
| H A D | VectorRewritePatterns.h | 33 Flat = 1, enumerator
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructions.td | 15 int Flat = 0; 433 def LoadAddress_flat : AddressSpaceList<[ AddrSpaces.Flat, 437 def StoreAddress_flat : AddressSpaceList<[ AddrSpaces.Flat, AddrSpaces.Global ]>;
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| H A D | AMDGPU.td | 68 "Flat instructions have immediate offset addressing mode" 818 "Flat Scratch register is a readonly SPI initialized architected register"
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| H A D | FLATInstructions.td | 578 // Flat Instructions 928 // Flat Patterns
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/MCTargetDesc/ |
| H A D | SPIRVBaseInfo.h | 470 Flat = 14, enumerator
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| H A D | SPIRVBaseInfo.cpp | 630 CASE(Decoration, Flat) in getDecorationName()
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| /llvm-project-15.0.7/mlir/test/lib/Dialect/Vector/ |
| H A D | TestVectorTransforms.cpp | 253 VectorTransposeLowering::Flat)); in runOnOperation()
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| /llvm-project-15.0.7/mlir/lib/Target/SPIRV/Serialization/ |
| H A D | Serializer.cpp | 234 case spirv::Decoration::Flat: in processDecoration()
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUUsage.rst | 691 Flat access to scratch requires hardware aperture setup and setup in the 692 kernel prologue (see :ref:`amdgpu-amdhsa-kernel-prolog-flat-scratch`). Flat 1919 ``DW_ADDR_none`` 0x0000 Generic (Flat) 4654 then Flat Scratch Init 2 See 4676 Flat Scratch Init value. 4772 5. Flat Scratch register pair initialization is described in 4849 Flat Scratch 4857 Flat scratch is not supported and there is no flat scratch register pair. 4868 1. The low word of Flat Scratch Init is the 32-bit byte offset from 4892 2. The second word of Flat Scratch Init is 32-bit byte size of a single [all …]
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| H A D | AMDGPUOperandSyntax.rst | 396 Flat scratch address, 64-bits wide. Holds the base address of scratch memory.
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| /llvm-project-15.0.7/mlir/lib/Target/SPIRV/Deserialization/ |
| H A D | Deserializer.cpp | 271 case spirv::Decoration::Flat: in processDecoration()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Vector/Transforms/ |
| H A D | VectorTransforms.cpp | 412 vector::VectorTransposeLowering::Flat && in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/ |
| H A D | SPIRVBase.td | 2104 def SPV_D_Flat : I32EnumAttrCase<"Flat", 14> {
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