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Searched refs:FX (Results 1 – 21 of 21) sorted by relevance

/llvm-project-15.0.7/clang/test/Layout/
H A Dms-x86-primary-bases.cpp262 struct FX : virtual B1X { int a; FX() : a(0xf000000F) {} }; in FX() function
293 sizeof(FX)];
/llvm-project-15.0.7/clang/include/clang/AST/
H A DOptionalDiagnostic.h66 OptionalDiagnostic &operator<<(const llvm::APFixedPoint &FX) {
69 FX.toString(Buffer);
H A DAPValue.h316 explicit APValue(APFixedPoint FX) : Kind(None) {
317 MakeFixedPoint(std::move(FX));
588 void setFixedPoint(APFixedPoint FX) {
590 *(APFixedPoint *)(char *)&Data = std::move(FX);
635 void MakeFixedPoint(APFixedPoint &&FX) {
637 new ((void *)(char *)&Data) APFixedPoint(std::move(FX));
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCScheduleP10.td278 // A FX pipeline may take from 2 to 3 cycles to complete.
379 // Save 1 cycles if pipeline BR reads the data from pipelines FX, F2.
391 // Save 1 cycles if pipeline F2 reads the data from pipelines ST, SX, FX, F2, PM.
394 // Save 1 cycles if pipeline FX reads the data from pipelines ST, SX, FX, F2, PM.
397 // Save 1 cycles if pipeline LD reads the data from pipelines ST, SX, FX, F2.
403 // Save 1 cycles if pipeline PM reads the data from pipelines ST, SX, FX, F2, PM.
406 // Save 1 cycles if pipeline ST reads the data from pipelines ST, SX, FX, F2, PM.
409 // Save 1 cycles if pipeline SX reads the data from pipelines ST, SX, FX, F2, PM, MM.
H A DPPCScheduleP7.td33 def P7_FX1 : FuncUnit; // FX pipeline 1
34 def P7_FX2 : FuncUnit; // FX pipeline 2
45 // Each LSU pipeline can also execute FX add and logical instructions.
51 // FX loads have a two cycle load-to-use latency (so one "bubble" cycle).
54 // Frequent FX ops. take only one cycle and results can be used again in the
55 // next cycle (there is a self-bypass). Getting results from the other FX
59 // (instead of 3 cycles on the POWER6). VSU XS handles vector FX-style ops.
H A DPPCScheduleP8.td38 def P8_FXU1 : FuncUnit; // FX pipeline 1
39 def P8_FXU2 : FuncUnit; // FX pipeline 2
/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DAPFixedPoint.h230 inline raw_ostream &operator<<(raw_ostream &OS, const APFixedPoint &FX) {
231 OS << FX.toString();
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A Dgfx10_fx_operand.rst10 FX Operand
H A Dgfx900_fx_operand.rst10 FX Operand
H A Dgfx904_fx_operand.rst10 FX Operand
H A Dgfx906_fx_operand.rst10 FX Operand
H A Dgfx90a_fx_operand.rst10 FX Operand
H A Dgfx1030_fx_operand.rst10 FX Operand
H A Dgfx908_fx_operand.rst10 FX Operand
H A Dgfx940_fx_operand.rst10 FX Operand
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dfreeze.ll336 ; CHECK-NEXT: [[FX:%.*]] = freeze float [[X:%.*]]
338 ; CHECK-NEXT: [[C:%.*]] = fcmp oeq float [[FX]], [[FY]]
350 ; CHECK-NEXT: [[FX:%.*]] = freeze float [[X:%.*]]
352 ; CHECK-NEXT: [[C:%.*]] = fcmp nnan oeq float [[FX]], [[FY]]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp735 int FX = cast<FrameIndexSDNode>(N)->getIndex(); in SelectFrameIndex() local
738 SDValue FI = CurDAG->getTargetFrameIndex(FX, MVT::i32); in SelectFrameIndex()
748 if (FX < 0 || MaxA <= StkA || !MFI.hasVarSizedObjects()) { in SelectFrameIndex()
1312 int FX = cast<FrameIndexSDNode>(N)->getIndex(); in SelectAddrFI() local
1313 if (!MFI.isFixedObjectIndex(FX) && HFI.needsAligna(*MF)) in SelectAddrFI()
1315 R = CurDAG->getTargetFrameIndex(FX, MVT::i32); in SelectAddrFI()
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dlftr-multi-exit.ll403 ; CHECK-NEXT: [[FX:%.*]] = udiv i32 [[IV]], 4
405 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[FX]], 1024
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVPseudos.td124 string FX = fx;
1924 defm "_V" # f.FX : VPseudoBinary<m.vrclass, m.vrclass,
1931 defm "_V" # f.FX :
1971 defm "_V" # f.FX : VPseudoBinary<m.wvrclass, m.vrclass,
2066 def "_V" # f.FX # "M_" # m.MX :
2071 def "_V" # f.FX # "M_" # m.MX # "_TU":
2121 def "_" # f.FX # "_" # m.MX :
2124 def "_" # f.FX # "_" # m.MX # "_TU":
2249 defm "_V" # f.FX :
4989 def "PseudoVFMV_" # f.FX # "_S_" # m.MX :
[all …]
H A DRISCVInstrInfoF.td115 def FX : ExtInfo_rr<FExt, FPR32, GPR>;
126 defvar FXINX = [FX, FX_INX];
/llvm-project-15.0.7/llvm/docs/
H A DAMDGPUUsage.rst246 … - FX-7500
249 … - FX-7600P
284 … - FX-8800P
293 … - FX-9800P
294 … - FX-9830P