Searched refs:FSLW (Results 1 – 3 of 3) sorted by relevance
87 FSLW, enumerator
42 def riscv_fslw : SDNode<"RISCVISD::FSLW", SDT_RISCVIntShiftDOpW>;472 def FSLW : RVBTernaryR<0b10, 0b001, OPC_OP_32,1007 (FSLW GPR:$rs1, GPR:$rs2, GPR:$rs3)>;1012 // We can use FSRIW for FSLW by immediate if we subtract the immediate from
6760 return RISCVISD::FSLW; in getRISCVWOpcodeByIntr()7200 unsigned Opc = RISCVISD::FSLW; in ReplaceNodeResults()8968 case RISCVISD::FSLW: { in PerformDAGCombine()8970 N->getOpcode() == RISCVISD::FSRW || N->getOpcode() == RISCVISD::FSLW; in PerformDAGCombine()9675 case RISCVISD::FSLW: in ComputeNumSignBitsForTargetNode()11630 NODE_NAME_CASE(FSLW) in getTargetNodeName()