Searched refs:FMSUB (Results 1 – 14 of 14) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 1489 case CASE_VFMA_SPLATS(FMSUB): in findCommutedOpIndices() 1521 case CASE_VFMA_OPCODE_LMULS_MF4(FMSUB, VV): in findCommutedOpIndices() 1636 case CASE_VFMA_SPLATS(FMSUB): in commuteInstructionImpl() 1661 CASE_VFMA_CHANGE_OPCODE_SPLATS(FMSAC, FMSUB) in commuteInstructionImpl() 1662 CASE_VFMA_CHANGE_OPCODE_SPLATS(FMSUB, FMSAC) in commuteInstructionImpl() 1668 CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(FMSAC, FMSUB, VV) in commuteInstructionImpl() 1685 case CASE_VFMA_OPCODE_LMULS_MF4(FMSUB, VV): in commuteInstructionImpl() 1699 CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(FMSUB, FMSAC, VV) in commuteInstructionImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCSchedPredicates.td | 47 FMSUB,
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| H A D | P10InstrResources.td | 206 FMSUB,
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| H A D | P9InstrResources.td | 416 (instregex "FMSUB(S)?$"),
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| H A D | PPCInstrInfo.td | 2827 defm FMSUB : AForm_1r<63, 28, 3229 (FMSUB $A, $B, $C)>; 3245 def : Pat<(int_ppc_fmsub f64:$A, f64:$B, f64:$C), (FMSUB $A, $B, $C)>;
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 325 CASE_FMA4_PACKED_RR(FMSUB) in printFMAComments() 326 CASE_FMA4_SCALAR_RR(FMSUB) in printFMAComments() 329 CASE_FMA4_PACKED_RM(FMSUB) in printFMAComments() 330 CASE_FMA4_SCALAR_RM(FMSUB) in printFMAComments() 335 CASE_FMA4_PACKED_MR(FMSUB) in printFMAComments() 336 CASE_FMA4_SCALAR_MR(FMSUB) in printFMAComments()
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | forwarding-A57.s | 318 # FMUL, FMUL, FNMUL, FMADD, FMSUB, FNMADD, FNMSUB are impacted
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 553 FMSUB, enumerator
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| H A D | X86InstrFragmentsSIMD.td | 545 def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
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| H A D | X86ISelLowering.cpp | 33669 NODE_NAME_CASE(FMSUB) in getTargetNodeName() 40632 if (FMSub.getOpcode() != X86ISD::FMSUB) in combineShuffleToFMAddSub() 40635 if (FMAdd.getOpcode() != ISD::FMA || FMSub.getOpcode() != X86ISD::FMSUB || in combineShuffleToFMAddSub() 50692 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode() 50698 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode() 50707 case ISD::FMA: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode() 50710 case X86ISD::FMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode() 50732 case X86ISD::FMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode() 50734 case X86ISD::FNMADD: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode() 50799 case X86ISD::FMSUB: in getNegatedExpression() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedThunderX2T99.td | 1184 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| H A D | AArch64SchedThunderX3T110.td | 1291 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| H A D | AArch64SchedA64FX.td | 1559 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| H A D | AArch64InstrInfo.td | 4151 defm FMSUB : ThreeOperandFPData<0, 1, "fmsub", 4161 // N.b. FMSUB etc have the accumulator at the *end* of (outs), unlike
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