Searched refs:FADDS (Results 1 – 13 of 13) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | aix-p8vector-liveins.ll | 57 ; NOP8V: %5:f4rc = nofpexcept FADDS %0, %1, implicit $rm 58 ; NOP8V: %6:f4rc = nofpexcept FADDS killed %5, %2, implicit $rm 59 ; NOP8V: %7:f4rc = nofpexcept FADDS killed %6, %3, implicit $rm 60 ; NOP8V: %8:f4rc = nofpexcept FADDS killed %7, %4, implicit $rm
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| H A D | convert-rr-to-ri-instrs.mir | 3212 %13 = FADDS killed %7, killed %12, implicit $rm
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCSchedPredicates.td | 16 FADDS,
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| H A D | P10InstrResources.td | 180 FADDS,
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| H A D | PPCInstrInfo.cpp | 257 case PPC::FADDS: in isAssociativeAndCommutative() 308 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1, PPC::FSUBS}};
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| H A D | PPCInstrInfo.td | 2878 defm FADDS : AForm_2r<59, 21,
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86IntrinsicsInfo.h | 458 X86ISD::FADDS, X86ISD::FADDS_RND), 460 X86ISD::FADDS, X86ISD::FADDS_RND), 998 X86ISD::FADDS, X86ISD::FADDS_RND),
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| H A D | X86ISelLowering.h | 217 FADDS, enumerator
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| H A D | X86InstrFragmentsSIMD.td | 513 def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;
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| H A D | X86ISelLowering.cpp | 33736 NODE_NAME_CASE(FADDS) in getTargetNodeName()
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | CodeGenerator.rst | 1040 (FMADDS (FADDS W, X), Y, Z) 1044 The ``FADDS`` instruction is a simple binary single-precision add instruction. 1056 def FADDS : AForm_2<59, 21,
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 604 // e.g. FADDD, FADDS, FSUBD, and etc. 1369 defm FADDS : RRFm<"fadd.s", 0x4C, F32, f32, fadd, simm7fp, mimmfp32>;
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 1294 def FADDS : F3_3<2, 0b110100, 0b001000001,
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