Searched refs:ExtraVT (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 572 EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth); in LegalizeStoreOps() local
591 ExtraVT, ST->getOriginalAlign(), MMOFlags, AAInfo); in LegalizeStoreOps()
610 ExtraVT, ST->getOriginalAlign(), MMOFlags, AAInfo); in LegalizeStoreOps()
783 EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth); in LegalizeLoadOps() local
800 ExtraVT, LD->getOriginalAlign(), MMOFlags, AAInfo); in LegalizeLoadOps()
828 ExtraVT, LD->getOriginalAlign(), MMOFlags, AAInfo); in LegalizeLoadOps()
2925 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode() local
2935 if (ExtraVT.isScalarInteger() && ExtraVT.getSizeInBits() == 1) { in ExpandNode()
2948 ExtraVT.getScalarSizeInBits(); in ExpandNode()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2722 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG() local
2736 SDValue VTOp = DAG.getValueType(ExtraVT.getScalarType()); in LowerSIGN_EXTEND_INREG()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 51403 EVT ExtraVT = cast<VTSDNode>(N1)->getVT(); in combineSextInRegCmov() local
51405 if (ExtraVT != MVT::i8 && ExtraVT != MVT::i16) in combineSextInRegCmov()
51467 EVT ExtraVT = cast<VTSDNode>(N1)->getVT(); in combineSignExtendInReg() local
51490 if (N00.getValueType() == MVT::v4i32 && ExtraVT.getSizeInBits() < 128) { in combineSignExtendInReg()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5566 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerOperation() local
5567 EVT ExtraEltVT = ExtraVT.getVectorElementType(); in LowerOperation()
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