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Searched refs:Even (Results 1 – 25 of 160) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp102 enum class Color { Even, Odd }; enumerator
261 return OverrideBalance == 1 ? Color::Even : Color::Odd; in getPreferredColor()
465 Color PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
489 Parity += (C == Color::Even) ? G->size() : -G->size(); in colorChainSet()
490 PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
715 return Color::Even; in getColor()
/llvm-project-15.0.7/lld/test/COFF/
H A Dautoimport-list-ptrs.s8 # Even if we didn't actually write any pseudo relocations,
H A Dpdb-thinlto.ll6 ; Even if the native object is cached, the PDB must be the same.
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dlist-element-bitref.td7 string V2 = !if(L[0]{0}, "Odd", "Even");
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/bugprone/
H A Dincorrect-roundings.rst15 number below 0.5) rounds to 1.0. Even worse behavior for negative
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td73 // Even or an Odd queue. The EXECE represents the even queues and the EXECO
78 //Even Exec Ports
90 //Even ALU pipelines
104 //Even DP pipelines
141 // Even slice ('E')- certain operations must be sent only to an even slice.
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dpie.ll9 ; Test that we only use one load. Even that is only needed because there
H A Dregpair_hint_phys.ll2 ; ARM target used to fail an assertion if RegPair{Odd|Even} hint pointed to a
/llvm-project-15.0.7/llvm/test/Analysis/ValueTracking/
H A Dfunc-ptr-lsb.ll9 ; Even though the address of @foo is aligned, we cannot assume that the
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/concurrency/
H A Dthread-canceltype-asynchronous.rst9 ``PTHREAD_CANCEL_DEFERRED`` instead which is the default. Even with deferred
/llvm-project-15.0.7/lldb/include/lldb/Host/
H A DTerminal.h24 Even, enumerator
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonIICHVX.td20 // and V6_vS32b_new_ai. Even though these instructions use CVI_LD resource,
/llvm-project-15.0.7/llvm/test/Transforms/PGOProfile/
H A Dicp_vararg_sret.ll14 ; Even though value profiling suggests @va_func is the call target, don't do
/llvm-project-15.0.7/clang/test/Profile/
H A DREADME14 .profdata file that is consumed by the tests for -fprofile-instr-use. Even
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Difcvt-impuse-livein.mir31 ; Even though r2 was not live on entry to this block, it was live across
/llvm-project-15.0.7/lld/test/MachO/
H A Darm64-reloc-pointer-to-got.s7 ## FIXME: Even though we have reserved a GOT slot for _foo due to
/llvm-project-15.0.7/clang/test/Modules/
H A DWerror-Wsystem-headers.m10 // Even with -Werror don't rebuild a system module
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dx86-sanitizer-shrink-wrapping.ll6 ; Even if the target supports shrink-wrapping, the prologue and epilogue
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h367 uint64_t Even = Mask & 0xAAAAAAAAAAAAAAAAULL; in getNumCoveredRegs() local
368 Mask = (Even >> 1) | Mask; in getNumCoveredRegs()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Drecursion.ll48 ; TODO: Even though tail_recursive is only called as a tail call, we
/llvm-project-15.0.7/polly/test/ScopDetect/
H A Dnon-constant-add-rec-start-expr.ll8 ; this very specific pattern does not seem too common. Even in this test case,
/llvm-project-15.0.7/lld/test/ELF/linkerscript/
H A Dassert.s22 ## Even without SECTIONS block we still use section names
/llvm-project-15.0.7/llvm/test/Transforms/LowerTypeTests/
H A Dcfi-direct-call.ll35 ; Even though a jump table entry is generated, the call goes directly
/llvm-project-15.0.7/llvm/test/tools/yaml2obj/ELF/
H A Dsymtab-shlink.yaml43 ## Even if .strtab is defined in YAML, we can explicitly link .symtab
/llvm-project-15.0.7/llvm/test/Transforms/DeadStoreElimination/
H A Dmultiblock-exceptions.ll9 ; Make sure we do not eliminate `store i32 20, i32* %sv`. Even though it is a store

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