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Searched refs:EnablePredicatedInterleavedMemAccesses (Results 1 – 1 of 1) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Analysis/
H A DVectorUtils.cpp1172 bool EnablePredicatedInterleavedMemAccesses) { in analyzeInterleaving() argument
1213 (!isPredicated(B->getParent()) || EnablePredicatedInterleavedMemAccesses)) { in analyzeInterleaving()
1316 (!EnablePredicatedInterleavedMemAccesses || BlockA != BlockB)) in analyzeInterleaving()
1415 if (!EnablePredicatedInterleavedMemAccesses) { in analyzeInterleaving()