| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsPostLegalizerCombiner.cpp | 47 MipsPostLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in MipsPostLegalizerCombinerInfo() argument
50 /*LegalizerInfo*/ LI, EnableOpt, OptSize, MinSize), in MipsPostLegalizerCombinerInfo()
120 bool EnableOpt = in runOnMachineFunction() local
128 MipsPostLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerInfo.h | 33 EnableOpt(OptEnabled), EnableOptSize(OptSize), EnableMinSize(MinSize) { in CombinerInfo()
50 bool EnableOpt; variable
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 185 AMDGPUPreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AMDGPUPreLegalizerCombinerInfo() argument
188 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), in AMDGPUPreLegalizerCombinerInfo()
271 bool EnableOpt = in runOnMachineFunction() local
276 AMDGPUPreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| H A D | AMDGPURegBankCombiner.cpp | 385 AMDGPURegBankCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AMDGPURegBankCombinerInfo() argument
389 /*LegalizerInfo*/ LI, EnableOpt, OptSize, MinSize), in AMDGPURegBankCombinerInfo()
462 bool EnableOpt = in runOnMachineFunction() local
472 AMDGPURegBankCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| H A D | AMDGPUPostLegalizerCombiner.cpp | 334 AMDGPUPostLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AMDGPUPostLegalizerCombinerInfo() argument
338 /*LegalizerInfo*/ LI, EnableOpt, OptSize, MinSize), in AMDGPUPostLegalizerCombinerInfo()
421 bool EnableOpt = in runOnMachineFunction() local
431 AMDGPUPostLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| H A D | AMDGPUTargetMachine.cpp | 565 bool EnableOpt = getOptLevel() > CodeGenOpt::None; in adjustPassManager() local
567 bool EarlyInline = EarlyInlineAll && EnableOpt && !EnableFunctionCalls; in adjustPassManager()
568 bool AMDGPUAA = EnableAMDGPUAliasAnalysis && EnableOpt; in adjustPassManager()
569 bool LibCallSimplify = EnableLibCallSimplify && EnableOpt; in adjustPassManager()
613 [EnableOpt, PromoteKernelArguments](const PassManagerBuilder &, in adjustPassManager()
631 if (EnableOpt) in adjustPassManager()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 364 AArch64PreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AArch64PreLegalizerCombinerInfo() argument
367 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), in AArch64PreLegalizerCombinerInfo()
401 unsigned MaxLen = EnableOpt ? 0 : 32; in combine()
465 bool EnableOpt = in runOnMachineFunction() local
469 AArch64PreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| H A D | AArch64O0PreLegalizerCombiner.cpp | 59 AArch64O0PreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AArch64O0PreLegalizerCombinerInfo() argument
63 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), in AArch64O0PreLegalizerCombinerInfo()
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| H A D | AArch64PostLegalizerCombiner.cpp | 348 AArch64PostLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, in AArch64PostLegalizerCombinerInfo() argument
352 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), in AArch64PostLegalizerCombinerInfo()
423 bool EnableOpt = in runOnMachineFunction() local
428 AArch64PostLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), in runOnMachineFunction()
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| /llvm-project-15.0.7/mlir/docs/Tutorials/Toy/ |
| H A D | Ch-6.md | 270 /*optLevel=*/EnableOpt ? 3 : 0, /*sizeLevel=*/0,
296 /*optLevel=*/EnableOpt ? 3 : 0, /*sizeLevel=*/0,
|