Searched refs:EmitTileLoad (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 568 MachineBasicBlock *EmitTileLoad(unsigned Opc, unsigned BaseReg,
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| H A D | AArch64ISelLowering.cpp | 2407 AArch64TargetLowering::EmitTileLoad(unsigned Opc, unsigned BaseReg, in EmitTileLoad() function in AArch64TargetLowering
2540 return EmitTileLoad(AArch64::LD1_MXIPXX_H_B, AArch64::ZAB0, MI, BB); in EmitInstrWithCustomInserter()
2542 return EmitTileLoad(AArch64::LD1_MXIPXX_H_H, AArch64::ZAH0, MI, BB); in EmitInstrWithCustomInserter()
2544 return EmitTileLoad(AArch64::LD1_MXIPXX_H_S, AArch64::ZAS0, MI, BB); in EmitInstrWithCustomInserter()
2546 return EmitTileLoad(AArch64::LD1_MXIPXX_H_D, AArch64::ZAD0, MI, BB); in EmitInstrWithCustomInserter()
2548 return EmitTileLoad(AArch64::LD1_MXIPXX_H_Q, AArch64::ZAQ0, MI, BB); in EmitInstrWithCustomInserter()
2550 return EmitTileLoad(AArch64::LD1_MXIPXX_V_B, AArch64::ZAB0, MI, BB); in EmitInstrWithCustomInserter()
2552 return EmitTileLoad(AArch64::LD1_MXIPXX_V_H, AArch64::ZAH0, MI, BB); in EmitInstrWithCustomInserter()
2554 return EmitTileLoad(AArch64::LD1_MXIPXX_V_S, AArch64::ZAS0, MI, BB); in EmitInstrWithCustomInserter()
2556 return EmitTileLoad(AArch64::LD1_MXIPXX_V_D, AArch64::ZAD0, MI, BB); in EmitInstrWithCustomInserter()
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