Searched refs:EX2 (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | user-macro-argument-separation.s | 12 .macro EX2 insn, rd, imm, rs macro 18 EX2 addiu $2, 1 $3 # CHECK: addiu $2, $3, 1 19 EX2 addiu $2, ~1 $3 # CHECK: addiu $2, $3, -2 20 EX2 addiu $2, ~ 1 $3 # CHECK: addiu $2, $3, -2 21 EX2 addiu $2, 1+1 $3 # CHECK: addiu $2, $3, 2 22 EX2 addiu $2, 1+ 1 $3 # CHECK: addiu $2, $3, 2 23 EX2 addiu $2, 1 +1 $3 # CHECK: addiu $2, $3, 2 24 EX2 addiu $2, 1 + 1 $3 # CHECK: addiu $2, $3, 2 25 EX2 addiu $2, 1+~1 $3 # CHECK: addiu $2, $3, -1 32 EX2 addiu $2, 1+(1) $3 # CHECK: addiu $2, $3, 2 [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 29 // EX2: fast load data ALUs FP operation 33 // There are shifters in both EX1 and EX2, and some instructions can be 34 // flexibly allocated between them. EX2 is used as the "zero" point 35 // for scheduling, so simple ALU operations executing in EX2 will have 333 // shifter but have timing as if they used the EX2 shifter as they usually 334 // can choose the EX2 shifter when needed. Will miss a few dual-issue cases,
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| H A D | ARMScheduleR52.td | 60 // ALU - Write occurs in Late EX2 (independent of whether shift was required) 78 // Branches - LR written in Late EX2
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA55.td | 216 // in say EX2 can be forwarded for consumption to ALU in EX1, thereby
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| /llvm-project-15.0.7/llvm/unittests/IR/ |
| H A D | PatternMatch.cpp | 949 Value *EX2 = IRB.CreateExtractElement(VI4, (uint64_t)0); in TEST_F() local 992 EXPECT_TRUE(match(EX2, m_ExtractElt(m_Value(), m_ConstantInt()))); in TEST_F()
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