Home
last modified time | relevance | path

Searched refs:EOR (Results 1 – 25 of 39) sorted by relevance

12

/llvm-project-15.0.7/flang/test/Lower/
H A Dio-statement-2.f9017 read(*, '(A)', ADVANCE='NO', ERR=10, END=20, EOR=30, IOSTAT=s, IOMSG=m) f
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/pseudo/
H A DEORWRdRr.mir3 # This test checks the expansion of the 16-bit EOR pseudo instruction.
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SchedTSV110.td368 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "(ADD|AND|EOR|ORR|SUB)[WX]r(r|i)")>;
369 def : InstRW<[TSV110Wr_1cyc_1AB], (instregex "(ADD|AND|EOR|ORR|SUB)S[WX]r(r|i)")>;
374 def : InstRW<[TSV110Wr_2cyc_1MDU], (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>;
375 def : InstRW<[TSV110Wr_2cyc_1AB], (instregex "^(AND|BIC|EON|EOR|ORN|ORR)S[WX]rs$")>;
554 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(AND|BIC|BIF|BIT|BSL|EOR|MVN|NOT|ORN|ORR)v")…
H A DAArch64SchedExynosM5.td637 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Wrs$")>;
638 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Xrs$")>;
695 def : InstRW<[M5WriteLGW], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?[BHW]$")>;
696 def : InstRW<[M5WriteLGX], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?X$")>;
793 def : InstRW<[M5WriteNALU2], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
H A DAArch64SchedNeoverseN2.td1521 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP$")>;
1759 (instregex "^(AND|EOR|ORR)_ZI$",
1760 "^(AND|BIC|EOR|EOR(BT|TB)?|ORR)_ZZZ$",
1761 "^EOR(BT|TB)_ZZZ_[BHSD]$",
1762 "^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]$")>;
H A DAArch64SchedA55.td423 def : InstRW<[CortexA55WriteAluVd_1], (instregex "(AND|EOR|NOT|ORN)v8i8",
425 def : InstRW<[CortexA55WriteAluVq_1], (instregex "(AND|EOR|NOT|ORN)v16i8",
H A DAArch64SchedFalkorDetails.td660 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v8i8$")>;
724 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v16i8$")>;
898 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^EOR(W|X)r(i|r|s)$")>;
H A DAArch64SchedExynosM3.td501 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
621 def : InstRW<[M3WriteNALU1], (instregex "^(AND|BIC|EOR|MVNI|NOT|ORN|ORR)v")>;
H A DAArch64SchedExynosM4.td599 def : InstRW<[M4WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
745 def : InstRW<[M4WriteNALU1], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
H A DAArch64SchedCyclone.td416 // AND,BIC,CMTST,EOR,ORN,ORR
H A DAArch64SchedThunderX2T99.td1234 // ASIMD logical (AND, BIC, EOR)
1361 (instregex "((AND|ORN|EOR|EON)S?(Xr[rsi]|v16i8|v8i16|v4i32)|" #
H A DAArch64SchedThunderX3T110.td1341 // ASIMD logical (AND, BIC, EOR)
1468 (instregex "((AND|ORN|EOR|EON)S?(Xr[rsi]|v16i8|v8i16|v4i32)|" #
H A DAArch64SchedKryoDetails.td435 …(instregex "((AND|ORN|EOR|EON)S?(Wr[rsi]|v8i8|v4i16|v2i32)|(ORR|BIC)S?(Wr[rs]|v8i8|v4i16|v2i32))")…
441 …(instregex "((AND|ORN|EOR|EON)S?(Xr[rsi]|v16i8|v8i16|v4i32)|(ORR|BIC)S?(Xr[rs]|v16i8|v8i16|v4i32))…
H A DAArch64SchedAmpere1.td939 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)(W|X)r")>;
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dsve-int-log-imm.ll48 ; EOR
H A Dcmpxchg-idioms.ll51 ; FIXME: DAG combine should be able to deal with this EOR better.
H A Dsve-intrinsics-logical-imm.ll117 ; EOR
H A Dsve-intrinsics-int-arith-merging.ll229 ; EOR
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dthumb1.txt140 # EOR
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s240 @ EOR
H A Dthumb2-narrow-dp.ll192 // EOR (commutative)
198 EOR r1, r1, r1 // Must use wide encoding as not flag-setting
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleM7.td326 (instregex "t2(ADC|ADDS|ADD|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|SUBS)rs$",
H A DARMScheduleSwift.td130 // AND,BIC,EOR,ORN,ORR
/llvm-project-15.0.7/flang/docs/
H A Df2018-grammar.md597 DELIM = scalar-default-char-expr | END = label | EOR = label |
614 [UNIT =] file-unit-number | END = label | EOR = label | ERR = label |
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp2346 auto EOR = in expand() local
2353 EOR->getOperand(3).setIsDead(); in expand()

12